On Tue, 27 Aug 2019 at 11:44, Peter Maydell <peter.mayd...@linaro.org> wrote:
>
> On Mon, 19 Aug 2019 at 22:38, Richard Henderson
> <richard.hender...@linaro.org> wrote:
> >
> > Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
> > ---
> > target/arm/translate.c | 560 ++++++++++++++++++++++-------------------
> > target/arm/a32.decode | 48 ++++
> > target/arm/t32.decode | 46 ++++
> > 3 files changed, 396 insertions(+), 258 deletions(-)
>
> > +static bool trans_STREXD_a32(DisasContext *s, arg_STREX *a)
> > +{
> > + if (!ENABLE_ARCH_6K || (a->rt & 1)) {
> > + return false;
> > + }
> > + a->rt2 = a->rt + 1;
> > + return op_strex(s, a, MO_64, false);
> > +}
>
> I've just noticed that there's a bug in these checks -- the
> M-profile CPUs don't have the V6K feature, but they should
> still have STREXB/STREXH/STREXD, and with this test they'll
> incorrectly UNDEF them.
...OK, not this specific function, as I just noticed it's the _a32
one, but trans_STREXB(), trans_STREXH(), etc are wrong.
thanks
-- PMM
