For each device declared with DEVICE_NATIVE_ENDIAN, find the set of targets from the set of target/hw/*/device.o.
If the set of targets are all little or all big endian, re-declare as DEVICE_LITTLE_ENDIAN or DEVICE_BIG_ENDIAN respectively. Then, on inspection: - if not used, re-declare as DEVICE_HOST_ENDIAN. - if max/min size=1, re-declare as DEVICE_HOST_ENDIAN. - if just a bit bucket, re-declare as DEVICE_HOST_ENDIAN - if PCI, re-declare as DEVICE_LITTLE_ENDIAN. - if for {ARM|unicore32} only, re-declare as DEVICE_LITTLE_ENDIAN. - if for SPARC only, re-declare as DEVICE_BIG_ENDIAN. Signed-off-by: Tony Nguyen <tony.ngu...@bt.com> --- hw/pci-host/bonito.c | 2 +- hw/pci-host/q35.c | 2 +- hw/pci-host/versatile.c | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index ceee463a11..c4bb9239b0 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -526,7 +526,7 @@ static const MemoryRegionOps bonito_spciconf_ops = { .valid.max_access_size = 4, .impl.min_access_size = 1, .impl.max_access_size = 4, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; #define BONITO_IRQ_BASE 32 diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 158d270b9f..485e2a02af 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -289,7 +289,7 @@ static void tseg_blackhole_write(void *opaque, hwaddr addr, uint64_t val, static const MemoryRegionOps tseg_blackhole_ops = { .read = tseg_blackhole_read, .write = tseg_blackhole_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, .valid.min_access_size = 1, .valid.max_access_size = 4, .impl.min_access_size = 4, diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c index b731d0544f..df7212237d 100644 --- a/hw/pci-host/versatile.c +++ b/hw/pci-host/versatile.c @@ -243,7 +243,7 @@ static uint64_t pci_vpb_reg_read(void *opaque, hwaddr addr, static const MemoryRegionOps pci_vpb_reg_ops = { .read = pci_vpb_reg_read, .write = pci_vpb_reg_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, .valid = { .min_access_size = 4, .max_access_size = 4, @@ -309,7 +309,7 @@ static uint64_t pci_vpb_config_read(void *opaque, hwaddr addr, static const MemoryRegionOps pci_vpb_config_ops = { .read = pci_vpb_config_read, .write = pci_vpb_config_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static int pci_vpb_map_irq(PCIDevice *d, int irq_num) -- 2.23.0