On Tue, Jul 23, 2019 at 08:00:27AM +0200, Cédric Le Goater wrote: > On 23/07/2019 03:38, David Gibson wrote: > > On Mon, Jul 22, 2019 at 08:23:47PM +0200, Cédric Le Goater wrote: > >> Make the current "powernv" machine an abstract type and derive from it > >> new machines with specific CPU models: power8, power8e, power8nvl, > >> power9. > >> > >> The "powernv" machine is now an alias on the "powernv9" machine. > >> > >> Signed-off-by: Cédric Le Goater <c...@kaod.org> > > > > Ah, sorry, I wasn't clear here. I don't think we need a different > > machine type for every cpu model, I just think we should have powernv8 > > and powernv9. POWER8E and POWER8NVL don't significantly change the > > system design (IIUC) so they can still be done with "-machine powernv8 > > -cpu POWER8E" or whatever. I expect the same will be true for POWER9' > > when that comes along > > I understand but I am afraid we will to have one machine per CPU family > because POWER8E and POWER8NVL already have their own PnvChip : > > DEFINE_PNV8_CHIP_TYPE(TYPE_PNV_CHIP_POWER8, pnv_chip_power8_class_init), > DEFINE_PNV8_CHIP_TYPE(TYPE_PNV_CHIP_POWER8E, pnv_chip_power8e_class_init), > DEFINE_PNV8_CHIP_TYPE(TYPE_PNV_CHIP_POWER8NVL, > pnv_chip_power8nvl_class_init),
Hrm. Is there an actual reason we need different chip classes for
these? Even if there is, I don't see an inherent reason that implies
separate machine classes as well.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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