On Thu, 4 Jul 2019 at 11:11, Philippe Mathieu-Daudé <phi...@redhat.com> wrote: > However, looking at the datasheet 'UG1085 (v1.0) November 24, 2015', > Chapter 22: Quad-SPI Controller, I understand this region is only > accessible by the CPU in READ mode, as an AXI slave. > > So, if we model this, even logging LOG_GUEST_ERROR is incorrect, we > should trap some AXI bus access error.
Well, that depends on what the decode and the device really do -- often datasheets are pretty sloppy and just describe what software "should" do, not what the h/w does if software does odd things... thanks -- PMM
