On 6/27/19 7:51 PM, Richard Henderson wrote:
> Please try the following patch on top and if it works I'll split it back into
> the patch set properly.
Dangit. I generated the patch on the wrong machine.
Let's try that again.
r~
diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c
index 6cc56cf..e929df3 100644
--- a/tcg/ppc/tcg-target.inc.c
+++ b/tcg/ppc/tcg-target.inc.c
@@ -1132,7 +1132,7 @@ static void tcg_out_mem_long(TCGContext *s, int opi, int
opx, TCGReg rt,
align = 3;
/* FALLTHRU */
default:
- if (rt != TCG_REG_R0) {
+ if (rt > TCG_REG_R0 && rt < 32) {
rs = rt;
break;
}
@@ -1161,7 +1161,7 @@ static void tcg_out_mem_long(TCGContext *s, int opi, int
opx, TCGReg rt,
}
tcg_debug_assert(!is_int_store || rs != rt);
tcg_out_movi(s, TCG_TYPE_PTR, rs, orig);
- tcg_out32(s, opx | TAB(rt, base, rs));
+ tcg_out32(s, opx | TAB(rt & 31, base, rs));
return;
}
@@ -1182,7 +1182,7 @@ static void tcg_out_mem_long(TCGContext *s, int opi, int
opx, TCGReg rt,
base = rs;
}
if (opi != ADDI || base != rt || l0 != 0) {
- tcg_out32(s, opi | TAI(rt, base, l0));
+ tcg_out32(s, opi | TAI(rt & 31, base, l0));
}
}
@@ -1204,11 +1204,11 @@ static void tcg_out_ld(TCGContext *s, TCGType type,
TCGReg ret,
break;
}
if (have_isa_2_07_vsx) {
- tcg_out_mem_long(s, 0, LXSIWZX | 1, ret & 31, base, offset);
+ tcg_out_mem_long(s, 0, LXSIWZX | 1, ret, base, offset);
break;
}
assert((offset & 3) == 0);
- tcg_out_mem_long(s, 0, LVEWX, ret & 31, base, offset);
+ tcg_out_mem_long(s, 0, LVEWX, ret, base, offset);
shift = (offset - 4) & 0xc;
if (shift) {
tcg_out_vsldoi(s, ret, ret, ret, shift);
@@ -1224,11 +1224,11 @@ static void tcg_out_ld(TCGContext *s, TCGType type,
TCGReg ret,
tcg_debug_assert(ret >= 32);
if (have_isa_2_06_vsx) {
tcg_out_mem_long(s, have_isa_3_00_vsx ? LXSD : 0, LXSDX | 1,
- ret & 31, base, offset);
+ ret, base, offset);
break;
}
assert((offset & 7) == 0);
- tcg_out_mem_long(s, 0, LVX, ret & 31, base, offset & -16);
+ tcg_out_mem_long(s, 0, LVX, ret, base, offset & -16);
if (offset & 8) {
tcg_out_vsldoi(s, ret, ret, ret, 8);
}
@@ -1237,7 +1237,7 @@ static void tcg_out_ld(TCGContext *s, TCGType type,
TCGReg ret,
tcg_debug_assert(ret >= 32);
assert((offset & 15) == 0);
tcg_out_mem_long(s, have_isa_3_00_vsx ? LXV | 8 : 0, LVX,
- ret & 31, base, offset);
+ ret, base, offset);
break;
default:
g_assert_not_reached();
@@ -1256,7 +1256,7 @@ static void tcg_out_st(TCGContext *s, TCGType type,
TCGReg arg,
break;
}
if (have_isa_2_07_vsx) {
- tcg_out_mem_long(s, 0, STXSIWX | 1, arg & 31, base, offset);
+ tcg_out_mem_long(s, 0, STXSIWX | 1, arg, base, offset);
break;
}
assert((offset & 3) == 0);
@@ -1265,7 +1265,7 @@ static void tcg_out_st(TCGContext *s, TCGType type,
TCGReg arg,
tcg_out_vsldoi(s, TCG_VEC_TMP1, arg, arg, shift);
arg = TCG_VEC_TMP1;
}
- tcg_out_mem_long(s, 0, STVEWX, arg & 31, base, offset);
+ tcg_out_mem_long(s, 0, STVEWX, arg, base, offset);
break;
case TCG_TYPE_I64:
if (arg < 32) {
@@ -1277,7 +1277,7 @@ static void tcg_out_st(TCGContext *s, TCGType type,
TCGReg arg,
tcg_debug_assert(arg >= 32);
if (have_isa_2_06_vsx) {
tcg_out_mem_long(s, have_isa_3_00_vsx ? STXSD : 0,
- STXSDX | 1, arg & 31, base, offset);
+ STXSDX | 1, arg, base, offset);
break;
}
assert((offset & 7) == 0);
@@ -1285,13 +1285,13 @@ static void tcg_out_st(TCGContext *s, TCGType type,
TCGReg arg,
tcg_out_vsldoi(s, TCG_VEC_TMP1, arg, arg, 8);
arg = TCG_VEC_TMP1;
}
- tcg_out_mem_long(s, 0, STVEWX, arg & 31, base, offset);
- tcg_out_mem_long(s, 0, STVEWX, arg & 31, base, offset + 4);
+ tcg_out_mem_long(s, 0, STVEWX, arg, base, offset);
+ tcg_out_mem_long(s, 0, STVEWX, arg, base, offset + 4);
break;
case TCG_TYPE_V128:
tcg_debug_assert(arg >= 32);
tcg_out_mem_long(s, have_isa_3_00_vsx ? STXV | 8 : 0, STVX,
- arg & 31, base, offset);
+ arg, base, offset);
break;
default:
g_assert_not_reached();
@@ -3075,7 +3075,6 @@ static bool tcg_out_dupm_vec(TCGContext *s, TCGType type,
unsigned vece,
int elt;
tcg_debug_assert(out >= 32);
- out &= 31;
switch (vece) {
case MO_8:
if (have_isa_3_00_vsx) {
