On Apr 20, 2011, at 4:46 PM, Richard Henderson wrote: > On 04/20/2011 02:06 AM, Tristan Gingold wrote: >> * sx164 is ev56 based, isn't it ? It would be nice if cpu version specific >> code is clearly marked. > > Yes, but most importantly it is the most evolved of the single hose systems. > QEMU is nowhere near ready to deal with multiple PCI host controllers, and > multiple ISA buses.
Right, but you could create an ev67 machine with a single PCI controller (or put all the devices on the same PCI controller). > I actually planned on emulating an EV67 but using the SX164 HW. I think the > Linux kernel will be that forgiving... > >> In particular (and IIRC), pal mode for ev6 is much closer to ev4 than to >> ev5. Don't know about ev7. >> It would be nice if we could easily support both ev5 and ev6. > > Ah, see, here's where there may be some confusion... > > I'm not implementing any of the real cpu ISRs. I'm not using any of the real > PALcode. I'm implementing my own QEMU-specific ISRs and and writing my own > PALcode, starting with MILO's PALcode but I've diverged significantly since. Ah, ok I understand. I fear that if you implement your own ISR, you will only be able to boot linux... which I suppose is your primary target. OTOH, it will be much faster than a native ISR. Tristan.
