In commit 89e68b575e138d0af1435f11a8ffcd8779c237bd, the handling of
VQADD and VQSUB was changed for Cortex-A and the new handling does
not return properly after calling tcg_gen_gvec_4(), thus the code
after is executed and that does not know about the VQADD or VQSUB
instructions and calls abort.
Detected running GCC testsuite for Cortex-A7 and executing the tests
in QEMU using Cortex-A15 since Cortex-A7 and Cortex-A15 have similar
instruction set.
Signed-off-by: Torbjörn SVENSSON <torbjorn.svens...@st.com>
---
target/arm/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index dd053c80d6..298c262825 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -6598,13 +6598,13 @@ static int disas_neon_data_insn(DisasContext *s,
uint32_t insn)
tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc),
rn_ofs, rm_ofs, vec_size, vec_size,
(u ? uqadd_op : sqadd_op) + size);
- break;
+ return 0;
case NEON_3R_VQSUB:
tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc),
rn_ofs, rm_ofs, vec_size, vec_size,
(u ? uqsub_op : sqsub_op) + size);
- break;
+ return 0;
case NEON_3R_VMUL: /* VMUL */
if (u) {
--
2.18.0
