Signed-off-by: David Hildenbrand <da...@redhat.com>
---
target/s390x/helper.h | 6 +++++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 34 ++++++++++++++++++++++++++
target/s390x/vec_string_helper.c | 41 ++++++++++++++++++++++++++++++++
4 files changed, 83 insertions(+)
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index fb50b404db..1f9f0b463b 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -230,6 +230,12 @@ DEF_HELPER_FLAGS_4(gvec_vfene32, TCG_CALL_NO_RWG, void,
ptr, cptr, cptr, i32)
DEF_HELPER_5(gvec_vfene_cc8, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfene_cc16, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfene_cc32, void, ptr, cptr, cptr, env, i32)
+DEF_HELPER_FLAGS_3(gvec_vistr8, TCG_CALL_NO_RWG, void, ptr, cptr, i32)
+DEF_HELPER_FLAGS_3(gvec_vistr16, TCG_CALL_NO_RWG, void, ptr, cptr, i32)
+DEF_HELPER_FLAGS_3(gvec_vistr32, TCG_CALL_NO_RWG, void, ptr, cptr, i32)
+DEF_HELPER_4(gvec_vistr_cc8, void, ptr, cptr, env, i32)
+DEF_HELPER_4(gvec_vistr_cc16, void, ptr, cptr, env, i32)
+DEF_HELPER_4(gvec_vistr_cc32, void, ptr, cptr, env, i32)
#ifndef CONFIG_USER_ONLY
DEF_HELPER_3(servc, i32, env, i64, i64)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index d03c1ee0b3..b4a6b59608 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -1199,6 +1199,8 @@
F(0xe780, VFEE, VRR_b, V, 0, 0, 0, 0, vfee, 0, IF_VEC)
/* VECTOR FIND ELEMENT NOT EQUAL */
F(0xe781, VFENE, VRR_b, V, 0, 0, 0, 0, vfene, 0, IF_VEC)
+/* VECTOR ISOLATE STRING */
+ F(0xe75c, VISTR, VRR_a, V, 0, 0, 0, 0, vistr, 0, IF_VEC)
#ifndef CONFIG_USER_ONLY
/* COMPARE AND SWAP AND PURGE */
diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
index e36cc5c401..437b416b4a 100644
--- a/target/s390x/translate_vx.inc.c
+++ b/target/s390x/translate_vx.inc.c
@@ -188,6 +188,9 @@ static void get_vec_element_ptr_i64(TCGv_ptr ptr, uint8_t
reg, TCGv_i64 enr,
#define gen_gvec_2s(v1, v2, c, gen) \
tcg_gen_gvec_2s(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
16, 16, c, gen)
+#define gen_gvec_2_ool(v1, v2, data, fn) \
+ tcg_gen_gvec_2_ool(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
+ 16, 16, data, fn)
#define gen_gvec_2i_ool(v1, v2, c, data, fn) \
tcg_gen_gvec_2i_ool(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
c, 16, 16, data, fn)
@@ -2446,3 +2449,34 @@ static DisasJumpType op_vfene(DisasContext *s, DisasOps
*o)
}
return DISAS_NEXT;
}
+
+static DisasJumpType op_vistr(DisasContext *s, DisasOps *o)
+{
+ const uint8_t es = get_field(s->fields, m4);
+ const uint8_t m5 = get_field(s->fields, m5);
+ static gen_helper_gvec_2_ptr * const cc[3] = {
+ gen_helper_gvec_vistr_cc8,
+ gen_helper_gvec_vistr_cc16,
+ gen_helper_gvec_vistr_cc32,
+ };
+ static gen_helper_gvec_2 * const nocc[3] = {
+ gen_helper_gvec_vistr8,
+ gen_helper_gvec_vistr16,
+ gen_helper_gvec_vistr32,
+ };
+
+ if (es > ES_32 || m5 & ~0x1) {
+ gen_program_exception(s, PGM_SPECIFICATION);
+ return DISAS_NORETURN;
+ }
+
+ if (m5 & 1) {
+ gen_gvec_2_ptr(get_field(s->fields, v1), get_field(s->fields, v2),
+ cpu_env, 0, cc[es]);
+ set_cc_static(s);
+ } else {
+ gen_gvec_2_ool(get_field(s->fields, v1), get_field(s->fields, v2), 0,
+ nocc[es]);
+ }
+ return DISAS_NEXT;
+}
diff --git a/target/s390x/vec_string_helper.c b/target/s390x/vec_string_helper.c
index 181f044fe5..2e998c21a2 100644
--- a/target/s390x/vec_string_helper.c
+++ b/target/s390x/vec_string_helper.c
@@ -207,3 +207,44 @@ void HELPER(gvec_vfene_cc##BITS)(void *v1, const void *v2,
const void *v3, \
DEF_VFENE_CC_HELPER(8)
DEF_VFENE_CC_HELPER(16)
DEF_VFENE_CC_HELPER(32)
+
+#define DEF_VISTR(BITS)
\
+static int vistr##BITS(void *v1, const void *v2)
\
+{
\
+ S390Vector tmp = {};
\
+ int i, cc = 3;
\
+
\
+ for (i = 0; i < (128 / BITS); i++) {
\
+ const uint##BITS##_t data = s390_vec_read_element##BITS(v2, i);
\
+
\
+ if (!data) {
\
+ cc = 0;
\
+ break;
\
+ }
\
+ s390_vec_write_element##BITS(&tmp, i, data);
\
+ }
\
+ *(S390Vector *)v1 = tmp;
\
+ return cc;
\
+}
+DEF_VISTR(8)
+DEF_VISTR(16)
+DEF_VISTR(32)
+
+#define DEF_VISTR_HELPER(BITS)
\
+void HELPER(gvec_vistr##BITS)(void *v1, const void *v2, uint32_t desc)
\
+{
\
+ vistr##BITS(v1, v2);
\
+}
+DEF_VISTR_HELPER(8)
+DEF_VISTR_HELPER(16)
+DEF_VISTR_HELPER(32)
+
+#define DEF_VISTR_CC_HELPER(BITS)
\
+void HELPER(gvec_vistr_cc##BITS)(void *v1, const void *v2,
\
+ CPUS390XState *env, uint32_t desc)
\
+{
\
+ env->cc_op = vistr##BITS(v1, v2);
\
+}
+DEF_VISTR_CC_HELPER(8)
+DEF_VISTR_CC_HELPER(16)
+DEF_VISTR_CC_HELPER(32)
--
2.20.1
