On 4/28/19 7:38 AM, Mark Cave-Ayland wrote:
> +#define GEN_VSX_HELPER_X2(name, op1, op2, inval, type)                       
>  \
> +static void gen_##name(DisasContext *ctx)                                    
>  \
> +{                                                                            
>  \
> +    TCGv_i32 opc;                                                            
>  \
> +    TCGv_ptr xt, xb;                                                         
>  \
> +    if (unlikely(!ctx->vsx_enabled)) {                                       
>  \
> +        gen_exception(ctx, POWERPC_EXCP_VSXU);                               
>  \
> +        return;                                                              
>  \
> +    }                                                                        
>  \
> +    opc = tcg_const_i32(ctx->opcode);                                        
>  \
> +    xt = gen_vsr_ptr(xT(ctx->opcode));                                       
>  \
> +    xb = gen_vsr_ptr(xB(ctx->opcode));                                       
>  \
> +    gen_helper_##name(cpu_env, opc, xt, xb);                                 
>  \

Similarly wrt opc.  However,

Reviewed-by: Richard Henderson <richard.hender...@linaro.org>


r~

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