Aravinda Prasad <aravi...@linux.vnet.ibm.com> writes: > + /* > + * Properly set bits in MSR before we invoke the handler. > + * SRR0/1, DAR and DSISR are properly set by KVM > + */ > + if (!(*pcc->interrupts_big_endian)(cpu)) { > + msr |= (1ULL << MSR_LE); > + } > + > + if (env->msr && (1ULL << MSR_SF)) {
Don't you mean & instead of &&? > + msr |= (1ULL << MSR_SF); > + }