On 3/12/19 7:31 PM, Peter Maydell wrote:
On Tue, 12 Mar 2019 at 13:15, Palmer Dabbelt <pal...@sifive.com> wrote:
The following changes since commit 377b155bde451d5ac545fbdcdfbf6ca17a4228f5:
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into
staging (2019-03-11 18:26:37 +0000)
are available in the Git repository at:
git://github.com/palmer-dabbelt/qemu.git tags/riscv-for-master-4.0-sf3
for you to fetch changes up to a971f8ae0e8ab6fab1eee199961b1ea2f4d876f7:
target/riscv: Remove decode_RV32_64G() (2019-03-12 03:08:34 -0700)
----------------------------------------------------------------
target/riscv: Convert to decodetree
I'm still seeing some errors about redefining typedefs, I'm afraid:
target/riscv/decode_insn16.inc.c:102:28: error: redefinition of
typedef 'arg_c_addi16sp_lui' is a C11 feature
[-Werror,-Wtypedef-redefinition]
target/riscv/decode_insn16.inc.c:122:17: error: redefinition of
typedef 'arg_c_j' is a C11 feature [-Werror,-Wtypedef-redefinition]
target/riscv/decode_insn16.inc.c:134:26: error: redefinition of
typedef 'arg_c_flwsp_ldsp' is a C11 feature
[-Werror,-Wtypedef-redefinition]
target/riscv/decode_insn16.inc.c:144:26: error: redefinition of
typedef 'arg_c_fswsp_sdsp' is a C11 feature
[-Werror,-Wtypedef-redefinition]
target/riscv/decode_insn16.inc.c:102:28: error: redefinition of
typedef 'arg_c_addi16sp_lui' is a C11 feature
[-Werror,-Wtypedef-redefinition]
target/riscv/decode_insn16.inc.c:122:17: error: redefinition of
typedef 'arg_c_j' is a C11 feature [-Werror,-Wtypedef-redefinition]
target/riscv/decode_insn16.inc.c:134:26: error: redefinition of
typedef 'arg_c_flwsp_ldsp' is a C11 feature
[-Werror,-Wtypedef-redefinition]
target/riscv/decode_insn16.inc.c:144:26: error: redefinition of
typedef 'arg_c_fswsp_sdsp' is a C11 feature
[-Werror,-Wtypedef-redefinition]
thanks
-- PMM
Hi Peter,
this should fix it:
diff --git a/target/riscv/insn16.decode b/target/riscv/insn16.decode
index 0829e3bc59..1a461616aa 100644
--- a/target/riscv/insn16.decode
+++ b/target/riscv/insn16.decode
@@ -50,15 +50,15 @@
&cs_dw uimm rs1 rs2
&cb imm rs1
&cr rd rs2
-&c_j imm
+&cj imm
&c_shift shamt rd
&c_ld uimm rd
&c_sd uimm rs2
-&c_addi16sp_lui imm_lui imm_addi16sp rd
-&c_flwsp_ldsp uimm_flwsp uimm_ldsp rd
-&c_fswsp_sdsp uimm_fswsp uimm_sdsp rs2
+&caddi16sp_lui imm_lui imm_addi16sp rd
+&cflwsp_ldsp uimm_flwsp uimm_ldsp rd
+&cfswsp_sdsp uimm_fswsp uimm_sdsp rs2
# Formats 16:
@cr .... ..... ..... .. &cr rs2=%rs2_5 %rd
@@ -72,17 +72,17 @@
@cs_d ... ... ... .. ... .. &cs_dw uimm=%uimm_cl_d rs1=%rs1_3
rs2=%rs2_3
@cs_w ... ... ... .. ... .. &cs_dw uimm=%uimm_cl_w rs1=%rs1_3
rs2=%rs2_3
@cb ... ... ... .. ... .. &cb imm=%imm_cb rs1=%rs1_3
-@cj ... ........... .. &c_j imm=%imm_cj
+@cj ... ........... .. &cj imm=%imm_cj
@c_ld ... . ..... ..... .. &c_ld uimm=%uimm_6bit_ld %rd
@c_lw ... . ..... ..... .. &c_ld uimm=%uimm_6bit_lw %rd
@c_sd ... . ..... ..... .. &c_sd uimm=%uimm_6bit_sd rs2=%rs2_5
@c_sw ... . ..... ..... .. &c_sd uimm=%uimm_6bit_sw rs2=%rs2_5
-@c_addi16sp_lui ... . ..... ..... .. &c_addi16sp_lui %imm_lui
%imm_addi16sp %rd
-@c_flwsp_ldsp ... . ..... ..... .. &c_flwsp_ldsp
uimm_flwsp=%uimm_6bit_lw \
+@c_addi16sp_lui ... . ..... ..... .. &caddi16sp_lui %imm_lui
%imm_addi16sp %rd
+@c_flwsp_ldsp ... . ..... ..... .. &cflwsp_ldsp
uimm_flwsp=%uimm_6bit_lw \
uimm_ldsp=%uimm_6bit_ld %rd
-@c_fswsp_sdsp ... . ..... ..... .. &c_fswsp_sdsp
uimm_fswsp=%uimm_6bit_sw \
+@c_fswsp_sdsp ... . ..... ..... .. &cfswsp_sdsp
uimm_fswsp=%uimm_6bit_sw \
uimm_sdsp=%uimm_6bit_sd rs2=%rs2_5
@c_shift ... . .. ... ..... .. &c_shift rd=%rs1_3
shamt=%nzuimm_6bit
@Palmer: I send a fixed version of the offending patch.
Cheers,
Bastian
