Patchew URL: https://patchew.org/QEMU/20190213155414.22285-1-pal...@sifive.com/
Hi, This series seems to have some coding style problems. See output below for more information: Message-id: 20190213155414.22285-1-pal...@sifive.com Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree Type: series === TEST SCRIPT BEGIN === #!/bin/bash git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu - [tag update] patchew/1550227757-10869-1-git-send-email-pbonz...@redhat.com -> patchew/1550227757-10869-1-git-send-email-pbonz...@redhat.com - [tag update] patchew/1550227757-10869-3-git-send-email-pbonz...@redhat.com -> patchew/1550227757-10869-3-git-send-email-pbonz...@redhat.com - [tag update] patchew/20190213155414.22285-1-pal...@sifive.com -> patchew/20190213155414.22285-1-pal...@sifive.com Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone' Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc' Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers' Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF' Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe' Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios' Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware' Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode' Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios' Submodule 'roms/seabios-hppa' (https://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa' Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios' Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot' Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot' Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex' Submodule 'tests/fp/berkeley-softfloat-3' (https://github.com/cota/berkeley-softfloat-3) registered for path 'tests/fp/berkeley-softfloat-3' Submodule 'tests/fp/berkeley-testfloat-3' (https://github.com/cota/berkeley-testfloat-3) registered for path 'tests/fp/berkeley-testfloat-3' Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb' Cloning into 'capstone'... Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf' Cloning into 'dtc'... Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536' Cloning into 'roms/QemuMacDrivers'... Submodule path 'roms/QemuMacDrivers': checked out '90c488d5f4a407342247b9ea869df1c2d9c8e266' Cloning into 'roms/SLOF'... Submodule path 'roms/SLOF': checked out 'a5b428e1c1eae703bdd62a3f527223c291ee3fdc' Cloning into 'roms/ipxe'... Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17' Cloning into 'roms/openbios'... Submodule path 'roms/openbios': checked out '441a84d3a642a10b948369c63f32367e8ff6395b' Cloning into 'roms/openhackware'... Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5' Cloning into 'roms/qemu-palcode'... Submodule path 'roms/qemu-palcode': checked out '51c237d7e20d05100eacadee2f61abc17e6bc097' Cloning into 'roms/seabios'... Submodule path 'roms/seabios': checked out 'a698c8995ffb2838296ec284fe3c4ad33dfca307' Cloning into 'roms/seabios-hppa'... Submodule path 'roms/seabios-hppa': checked out '1ef99a01572c2581c30e16e6fe69e9ea2ef92ce0' Cloning into 'roms/sgabios'... Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a' Cloning into 'roms/skiboot'... Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc' Cloning into 'roms/u-boot'... Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943' Cloning into 'roms/u-boot-sam460ex'... Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588' Cloning into 'tests/fp/berkeley-softfloat-3'... Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037' Cloning into 'tests/fp/berkeley-testfloat-3'... Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3' Cloning into 'ui/keycodemapdb'... Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce' Switched to a new branch 'test' 81ebc7c target/riscv: Remaining rvc insn reuse 32 bit translators 07c0cfd target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64 e1f0bb5 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64 b35997f target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns 8bc9b0b target/riscv: Convert @cs_2 insns to share translation functions e003dc6 target/riscv: Remove decode_RV32_64G() 4a32593 target/riscv: Remove gen_system() cb52b1e target/riscv: Rename trans_arith to gen_arith ee5a645 target/riscv: Remove manual decoding of RV32/64M insn b3a87be target/riscv: Remove shift and slt insn manual decoding f18704c target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists d0a25b0 target/riscv: Move gen_arith_imm() decoding into trans_* functions 2ca46e9 target/riscv: Remove manual decoding from gen_store() 78512d1 target/riscv: Remove manual decoding from gen_load() 212a925 target/riscv: Remove manual decoding from gen_branch() 2b7cdb3 target/riscv: Remove gen_jalr() 1c3aa40 target/riscv: Convert quadrant 2 of RVXC insns to decodetree 93939ee target/riscv: Convert quadrant 1 of RVXC insns to decodetree 117f738 target/riscv: Convert quadrant 0 of RVXC insns to decodetree 1dc304a target/riscv: Convert RV priv insns to decodetree 21873b8 target/riscv: Convert RV64D insns to decodetree 3bb9e01 target/riscv: Convert RV32D insns to decodetree 25fd782 target/riscv: Convert RV64F insns to decodetree 0ec4580 target/riscv: Convert RV32F insns to decodetree b688a74 target/riscv: Convert RV64A insns to decodetree 3e3b876 target/riscv: Convert RV32A insns to decodetree 4c96cca target/riscv: Convert RVXM insns to decodetree 8d39451 target/riscv: Convert RVXI csr insns to decodetree 372c0bd target/riscv: Convert RVXI fence insns to decodetree 63bab5f target/riscv: Convert RVXI arithmetic insns to decodetree 6b13955 target/riscv: Convert RV64I load/store insns to decodetree b462b29 target/riscv: Convert RV32I load/store insns to decodetree fef88e3 target/riscv: Convert RVXI branch insns to decodetree 9a7b36e target/riscv: Activate decodetree and implemnt LUI & AUIPC 4acf01b target/riscv: Move CPURISCVState pointer to DisasContext === OUTPUT BEGIN === 1/35 Checking commit 4acf01bc5ba3 (target/riscv: Move CPURISCVState pointer to DisasContext) 2/35 Checking commit 9a7b36e97b24 (target/riscv: Activate decodetree and implemnt LUI & AUIPC) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #33: new file mode 100644 ERROR: externs should be avoided in .c files #124: FILE: target/riscv/translate.c:1885: +bool decode_insn32(DisasContext *ctx, uint32_t insn); total: 1 errors, 1 warnings, 125 lines checked Patch 2/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 3/35 Checking commit fef88e3955da (target/riscv: Convert RVXI branch insns to decodetree) 4/35 Checking commit b462b29190b0 (target/riscv: Convert RV32I load/store insns to decodetree) 5/35 Checking commit 6b139558549d (target/riscv: Convert RV64I load/store insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #38: new file mode 100644 total: 0 errors, 1 warnings, 76 lines checked Patch 5/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 6/35 Checking commit 63bab5f9af5b (target/riscv: Convert RVXI arithmetic insns to decodetree) 7/35 Checking commit 372c0bd66ca4 (target/riscv: Convert RVXI fence insns to decodetree) 8/35 Checking commit 8d3945144df3 (target/riscv: Convert RVXI csr insns to decodetree) 9/35 Checking commit 4c96ccaa38ac (target/riscv: Convert RVXM insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #47: new file mode 100644 total: 0 errors, 1 warnings, 145 lines checked Patch 9/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 10/35 Checking commit 3e3b876eefdc (target/riscv: Convert RV32A insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #53: new file mode 100644 total: 0 errors, 1 warnings, 188 lines checked Patch 10/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 11/35 Checking commit b688a74af7db (target/riscv: Convert RV64A insns to decodetree) 12/35 Checking commit 0ec45801301f (target/riscv: Convert RV32F insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #77: new file mode 100644 total: 0 errors, 1 warnings, 416 lines checked Patch 12/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 13/35 Checking commit 25fd78228e88 (target/riscv: Convert RV64F insns to decodetree) 14/35 Checking commit 3bb9e015352c (target/riscv: Convert RV32D insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #50: new file mode 100644 total: 0 errors, 1 warnings, 373 lines checked Patch 14/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 15/35 Checking commit 21873b847a17 (target/riscv: Convert RV64D insns to decodetree) 16/35 Checking commit 1dc304a95399 (target/riscv: Convert RV priv insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #40: new file mode 100644 total: 0 errors, 1 warnings, 214 lines checked Patch 16/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 17/35 Checking commit 117f7383e425 (target/riscv: Convert quadrant 0 of RVXC insns to decodetree) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #30: new file mode 100644 ERROR: externs should be avoided in .c files #245: FILE: target/riscv/translate.c:1067: +bool decode_insn16(DisasContext *ctx, uint16_t insn); total: 1 errors, 1 warnings, 227 lines checked Patch 17/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 18/35 Checking commit 93939ee9a2f4 (target/riscv: Convert quadrant 1 of RVXC insns to decodetree) 19/35 Checking commit 1c3aa4016671 (target/riscv: Convert quadrant 2 of RVXC insns to decodetree) 20/35 Checking commit 2b7cdb329758 (target/riscv: Remove gen_jalr()) 21/35 Checking commit 212a9251371d (target/riscv: Remove manual decoding from gen_branch()) 22/35 Checking commit 78512d19dfaa (target/riscv: Remove manual decoding from gen_load()) 23/35 Checking commit 2ca46e9bed7b (target/riscv: Remove manual decoding from gen_store()) 24/35 Checking commit d0a25b0fa47d (target/riscv: Move gen_arith_imm() decoding into trans_* functions) 25/35 Checking commit f18704ce0f70 (target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists) 26/35 Checking commit b3a87befcc10 (target/riscv: Remove shift and slt insn manual decoding) 27/35 Checking commit ee5a6450750b (target/riscv: Remove manual decoding of RV32/64M insn) 28/35 Checking commit cb52b1ea618e (target/riscv: Rename trans_arith to gen_arith) 29/35 Checking commit 4a325930d344 (target/riscv: Remove gen_system()) 30/35 Checking commit e003dc6ca8be (target/riscv: Remove decode_RV32_64G()) 31/35 Checking commit 8bc9b0b98553 (target/riscv: Convert @cs_2 insns to share translation functions) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #41: new file mode 100644 ERROR: externs should be avoided in .c files #181: FILE: target/riscv/translate.c:543: +bool decode_insn16(DisasContext *ctx, uint16_t insn); total: 1 errors, 1 warnings, 164 lines checked Patch 31/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 32/35 Checking commit b35997f8d24a (target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns) 33/35 Checking commit e1f0bb51b974 (target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64) WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #27: new file mode 100644 total: 0 errors, 1 warnings, 309 lines checked Patch 33/35 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 34/35 Checking commit 07c0cfd32c28 (target/riscv: Splice remaining compressed insn pairs for riscv32 vs riscv64) 35/35 Checking commit 81ebc7cd3073 (target/riscv: Remaining rvc insn reuse 32 bit translators) === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/20190213155414.22285-1-pal...@sifive.com/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-de...@redhat.com
