On 3/26/11, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 26 March 2011 17:23, Dmitry Eremin-Solenikov <dbarysh...@gmail.com> > wrote: >> Can we assume (maybe temporarily) that all v5 are also v5TE? >> It seems it's currently done so, and I don't want to be too intrusive. > > All the cores we currently model that are v5 are v5TE, I think. > The current (v7) ARM ARM says the valid v5 variants are > v5T, v5TE and v5TEJ (with plain "ARMv5" only being in an > "obsolete variants" list), so I think we should distinguish v5T
Isn't there also the v5TExP? For which I know no chips in the wild. > and v5TE (the only difference being that a handful of instructions > are v5TE only, so that isn't a very intrusive change, it's just > saying ARCH(5TE) in a few of the places where your patch has ARCH(5)). > > So I think we should have ENABLE_ARCH_5T and ENABLE_ARCH_5TE macros > so we can use ARCH(5T) and ARCH(5TE), and not bother with a plain > ARCH(5) since it's "obsolete"... > > (Mostly what I'd like is for us to use the right value of 'foo' > where we add ARCH(foo) checks, just so we can trust them in future > and don't have to go back and recheck them. I don't mind if they > all turn out to be checking the same actual feature flag.) OK. I can then try to check all ARCH(5), substituting them if necessary with ARCH(5TE) or (5T), but for now this will just end with check for ARM_FEATURE_V5. Did I get your idea correct? But this (most probably) will be more or less with low priority patch idea for me. -- With best wishes Dmitry
