This patch enables QMP-based querying of the available CPU types for MIPS and MIPS64 platforms.
Signed-off-by: Pavel Dovgalyuk <pavel.dovga...@ispras.ru> --- monitor.c | 2 +- target/mips/helper.c | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 34 insertions(+), 1 deletion(-) diff --git a/monitor.c b/monitor.c index c09fa63940..25d3b141ad 100644 --- a/monitor.c +++ b/monitor.c @@ -1165,7 +1165,7 @@ static void qmp_unregister_commands_hack(void) qmp_unregister_command(&qmp_commands, "query-cpu-model-comparison"); #endif #if !defined(TARGET_PPC) && !defined(TARGET_ARM) && !defined(TARGET_I386) \ - && !defined(TARGET_S390X) + && !defined(TARGET_S390X) && !defined(TARGET_MIPS) qmp_unregister_command(&qmp_commands, "query-cpu-definitions"); #endif } diff --git a/target/mips/helper.c b/target/mips/helper.c index 8988452dbd..c84d056c09 100644 --- a/target/mips/helper.c +++ b/target/mips/helper.c @@ -24,6 +24,7 @@ #include "exec/cpu_ldst.h" #include "exec/log.h" #include "hw/mips/cpudevs.h" +#include "sysemu/arch_init.h" enum { TLBRET_XI = -6, @@ -1472,3 +1473,35 @@ void QEMU_NORETURN do_raise_exception_err(CPUMIPSState *env, cpu_loop_exit_restore(cs, pc); } + +static void mips_cpu_add_definition(gpointer data, gpointer user_data) +{ + ObjectClass *oc = data; + CpuDefinitionInfoList **cpu_list = user_data; + CpuDefinitionInfoList *entry; + CpuDefinitionInfo *info; + const char *typename; + + typename = object_class_get_name(oc); + info = g_malloc0(sizeof(*info)); + info->name = g_strndup(typename, + strlen(typename) - strlen("-" TYPE_MIPS_CPU)); + info->q_typename = g_strdup(typename); + + entry = g_malloc0(sizeof(*entry)); + entry->value = info; + entry->next = *cpu_list; + *cpu_list = entry; +} + +CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp) +{ + CpuDefinitionInfoList *cpu_list = NULL; + GSList *list; + + list = object_class_get_list(TYPE_MIPS_CPU, false); + g_slist_foreach(list, mips_cpu_add_definition, &cpu_list); + g_slist_free(list); + + return cpu_list; +}