On Tue, 15 Jan 2019 14:25:44 PST (-0800), alistai...@gmail.com wrote:
On Tue, Jan 15, 2019 at 2:24 PM Richard Henderson
<richard.hender...@linaro.org> wrote:
On 1/15/19 10:58 AM, Alistair Francis wrote:
> -static void riscv_tr_init_disas_context(DisasContextBase *dcbase, CPUState
*cs)
> +static void riscv_tr_init_disas_context(DisasContextBase *dcbase, CPUState
*cpu)
Why change this? I know there is variation in the naming, but my
preferred default mapping is CPUState *cs, RISCVCPU *cpu.
Good point, I have changed it back to cs.
I don't see a v2, so I'm just going to go ahead and squash in
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 8593c2170af4..b7176cbf98e1 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -2015,10 +2015,10 @@ static void decode_opc(DisasContext *ctx)
}
}
-static void riscv_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu)
+static void riscv_tr_init_disas_context(DisasContextBase *dcbase, CPUState
*cs)
{
DisasContext *ctx = container_of(dcbase, DisasContext, base);
- CPURISCVState *env = cpu->env_ptr;
+ CPURISCVState *env = cs->env_ptr;
ctx->pc_succ_insn = ctx->base.pc_first;
ctx->mem_idx = ctx->base.tb->flags & TB_FLAGS_MMU_MASK;
and add Richard's tag.
Alistair
Otherwise,
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
