On Wed, Dec 12, 2018 at 09:05:37PM +0800, Yu Zhang wrote: > Intel's upcoming processors will extend maximum linear address width to > 57 bits, and introduce 5-level paging for CPU. Meanwhile, the platform > will also extend the maximum guest address width for IOMMU to 57 bits, > thus introducing the 5-level paging for 2nd level translation(See chapter > 3 in Intel Virtualization Technology for Directed I/O). > > This patch series extends the current logic to support a wider address width. > A 5-level paging capable IOMMU(for 2nd level translation) can be rendered > with configuration "device intel-iommu,x-aw-bits=57". > > Also, kvm-unit-tests were updated to verify this patch series. Patch for > the test was sent out at: https://www.spinics.net/lists/kvm/msg177425.html. > > Note: this patch series checks the existance of 5-level paging in the host > and in the guest, and rejects configurations for 57-bit IOVA if either check > fails(VTD-d hardware shall not support 57-bit IOVA on platforms without CPU > 5-level paging). However, current vIOMMU implementation still lacks logic to > check against the physical IOMMU capability, future enhancements are expected > to do this. > > Changes in V3: > - Address comments from Peter Xu: squash the 3rd patch in v2 into the 2nd > patch in this version. > - Added "Reviewed-by: Peter Xu <pet...@redhat.com>" > > Changes in V2: > - Address comments from Peter Xu: add haw member in vtd_page_walk_info. > - Address comments from Peter Xu: only searches for 4K/2M/1G mappings in > iotlb are meaningful. > - Address comments from Peter Xu: cover letter changes(e.g. mention the test > patch in kvm-unit-tests). > - Coding style changes. > --- > Cc: "Michael S. Tsirkin" <m...@redhat.com> > Cc: Igor Mammedov <imamm...@redhat.com> > Cc: Marcel Apfelbaum <marcel.apfelb...@gmail.com> > Cc: Paolo Bonzini <pbonz...@redhat.com> > Cc: Richard Henderson <r...@twiddle.net> > Cc: Eduardo Habkost <ehabk...@redhat.com> > Cc: Peter Xu <pet...@redhat.com>
OK is this going anywhere? How about dropping cpu flags probing for now, you can always revisit it later. Will make it maybe a bit less user friendly but OTOH uncontriversial... > --- > > Yu Zhang (2): > intel-iommu: differentiate host address width from IOVA address width. > intel-iommu: extend VTD emulation to allow 57-bit IOVA address width. > > hw/i386/acpi-build.c | 2 +- > hw/i386/intel_iommu.c | 96 > +++++++++++++++++++++++++++++------------- > hw/i386/intel_iommu_internal.h | 10 ++++- > include/hw/i386/intel_iommu.h | 10 +++-- > 4 files changed, 81 insertions(+), 37 deletions(-) > > -- > 1.9.1
