On Tue, 8 Jan 2019 at 22:32, Richard Henderson <richard.hender...@linaro.org> wrote: > > Not that there are any stores involved, but why argue with ARM's > naming convention. > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > --- > v3: Use do_gpr_ld; fix sextend typo; iss_valid only for !wback.
What was the sextend typo ? > --- > target/arm/translate-a64.c | 60 ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 60 insertions(+) > > diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c > index fa50003f0b..a4dfdf5836 100644 > --- a/target/arm/translate-a64.c > +++ b/target/arm/translate-a64.c > @@ -3146,6 +3146,63 @@ static void disas_ldst_atomic(DisasContext *s, > uint32_t insn, > s->be_data | size | MO_ALIGN); > } > > +/* PAC memory operations > + * > + * 31 30 27 26 24 22 21 12 11 10 5 0 > + * +------+-------+---+-----+-----+---+--------+---+---+----+-----+ > + * | size | 1 1 1 | V | 0 0 | M S | 1 | imm9 | W | 1 | Rn | Rt | > + * +------+-------+---+-----+-----+------------+---+---+----+-----+ Utter nit: missing '+' between the '1' and 'imm9' boxes on the bottom line. Not worth respinning unless you need to for some other reason... Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM
