On Thu, 6 Dec 2018 at 17:55, Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> Provide a trivial implementation with zero limited ordering regions,
> which causes the LDLAR and STLLR instructions to devolve into the
> LDAR and STLR instructions from the base ARMv8.0 instruction set.
>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
>
> ---
> v2: Mark LORID_EL1 read-only.
> Add TLOR access checks.
> Conditionally unmask TLOR in hcr/scr_write.
> v3: Fix isar_feature_aa64_lor.
> Split out access_lor_ns.
> Defer all {E2H,TGE} vs TLOR testing to arm_hcr_el2_eff.
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
thanks
-- PMM
