On Wed, 5 Dec 2018 at 13:43, Aaron Lindsay <aa...@os.amperecomputing.com> wrote: > > This is immediately necessary for the PMUv3 implementation to check > ID_DFR0.PerfMon to enable/disable specific features, but defines the > full complement of fields for possible future use elsewhere. > > Signed-off-by: Aaron Lindsay <aa...@os.amperecomputing.com> > --- > target/arm/cpu.h | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > index 627e5c1995..304e6e47b3 100644 > --- a/target/arm/cpu.h > +++ b/target/arm/cpu.h > @@ -1586,6 +1586,14 @@ FIELD(ID_AA64PFR0, GIC, 24, 4) > FIELD(ID_AA64PFR0, RAS, 28, 4) > FIELD(ID_AA64PFR0, SVE, 32, 4) > > +FIELD(ID_DFR0, COPDBG, 0, 4) > +FIELD(ID_DFR0, COPSDBG, 4, 4) > +FIELD(ID_DFR0, MMAPDBG, 8, 4) > +FIELD(ID_DFR0, COPTRC, 12, 4) > +FIELD(ID_DFR0, MMAPTRC, 16, 4) > +FIELD(ID_DFR0, MPROFDBG, 20, 4) > +FIELD(ID_DFR0, PERFMON, 24, 4)
Also FIELD(ID_DFR0, TRACEFILT, 28, 4) (this is a v8.4 field; we might as well add it since you have another minor tweak that needs a respin.) Otherwise Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM
