On 11/28/18 5:31 AM, David Gibson wrote:
> On Fri, Nov 16, 2018 at 11:57:10AM +0100, Cédric Le Goater wrote:
>> The XIVE interface for the guest is described in the device tree under
>> the "interrupt-controller" node. A couple of new properties are
>> specific to XIVE :
>>
>> - "reg"
>>
>> contains the base address and size of the thread interrupt
>> managnement areas (TIMA), for the User level and for the Guest OS
>> level. Only the Guest OS level is taken into account today.
>>
>> - "ibm,xive-eq-sizes"
>>
>> the size of the event queues. One cell per size supported, contains
>> log2 of size, in ascending order.
>>
>> - "ibm,xive-lisn-ranges"
>>
>> the IRQ interrupt number ranges assigned to the guest for the IPIs.
>>
>> and also under the root node :
>>
>> - "ibm,plat-res-int-priorities"
>>
>> contains a list of priorities that the hypervisor has reserved for
>> its own use. OPAL uses the priority 7 queue to automatically
>> escalate interrupts for all other queues (DD2.X POWER9). So only
>> priorities [0..6] are allowed for the guest.
>>
>> Extend the sPAPR IRQ backend with a new handler to populate the DT
>> with the appropriate "interrupt-controller" node.
>>
>> Signed-off-by: Cédric Le Goater <c...@kaod.org>
>> ---
>> include/hw/ppc/spapr_irq.h | 2 ++
>> include/hw/ppc/spapr_xive.h | 2 ++
>> hw/intc/spapr_xive_hcall.c | 62 +++++++++++++++++++++++++++++++++++++
>> hw/ppc/spapr.c | 3 +-
>> hw/ppc/spapr_irq.c | 17 ++++++++++
>> 5 files changed, 85 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h
>> index c854ae527808..cfdc1f86e713 100644
>> --- a/include/hw/ppc/spapr_irq.h
>> +++ b/include/hw/ppc/spapr_irq.h
>> @@ -40,6 +40,8 @@ typedef struct sPAPRIrq {
>> void (*free)(sPAPRMachineState *spapr, int irq, int num);
>> qemu_irq (*qirq)(sPAPRMachineState *spapr, int irq);
>> void (*print_info)(sPAPRMachineState *spapr, Monitor *mon);
>> + void (*dt_populate)(sPAPRMachineState *spapr, uint32_t nr_servers,
>> + void *fdt, uint32_t phandle);
>> } sPAPRIrq;
>>
>> extern sPAPRIrq spapr_irq_xics;
>> diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h
>> index 418511f3dc10..5b3fab192d41 100644
>> --- a/include/hw/ppc/spapr_xive.h
>> +++ b/include/hw/ppc/spapr_xive.h
>> @@ -65,5 +65,7 @@ bool spapr_xive_priority_is_valid(uint8_t priority);
>> typedef struct sPAPRMachineState sPAPRMachineState;
>>
>> void spapr_xive_hcall_init(sPAPRMachineState *spapr);
>> +void spapr_dt_xive(sPAPRXive *xive, int nr_servers, void *fdt,
>> + uint32_t phandle);
>>
>> #endif /* PPC_SPAPR_XIVE_H */
>> diff --git a/hw/intc/spapr_xive_hcall.c b/hw/intc/spapr_xive_hcall.c
>> index 52e4e23995f5..66c78aa88500 100644
>> --- a/hw/intc/spapr_xive_hcall.c
>> +++ b/hw/intc/spapr_xive_hcall.c
>> @@ -890,3 +890,65 @@ void spapr_xive_hcall_init(sPAPRMachineState *spapr)
>> spapr_register_hypercall(H_INT_SYNC, h_int_sync);
>> spapr_register_hypercall(H_INT_RESET, h_int_reset);
>> }
>> +
>> +void spapr_dt_xive(sPAPRXive *xive, int nr_servers, void *fdt, uint32_t
>> phandle)
>> +{
>> + int node;
>> + uint64_t timas[2 * 2];
>> + /* Interrupt number ranges for the IPIs */
>> + uint32_t lisn_ranges[] = {
>> + cpu_to_be32(0),
>> + cpu_to_be32(nr_servers),
>> + };
>> + uint32_t eq_sizes[] = {
>> + cpu_to_be32(12), /* 4K */
>> + cpu_to_be32(16), /* 64K */
>> + cpu_to_be32(21), /* 2M */
>> + cpu_to_be32(24), /* 16M */
>> + };
>> + /* The following array is in sync with the
>> 'spapr_xive_priority_is_valid'
>> + * routine above. The O/S is expected to choose priority 6.
>> + */
>> + uint32_t plat_res_int_priorities[] = {
>> + cpu_to_be32(7), /* start */
>> + cpu_to_be32(0xf8), /* count */
>> + };
>> + gchar *nodename;
>> +
>> + /* Thread Interrupt Management Area : User (ring 3) and OS (ring 2) */
>> + timas[0] = cpu_to_be64(xive->tm_base + 3 * (1ull << TM_SHIFT));
>> + timas[1] = cpu_to_be64(1ull << TM_SHIFT);
>> + timas[2] = cpu_to_be64(xive->tm_base + 2 * (1ull << TM_SHIFT));
>
> Don't you have symbolic constants for the ring numbers, instead of '2'
> and '3' above?
I have offsets in the TIMA, 0x0, 0x10, ... We could add constants
for the ring numbers as they are used in the TIMA memory ops.
>
>> + timas[3] = cpu_to_be64(1ull << TM_SHIFT);
>> +
>> + nodename = g_strdup_printf("interrupt-controller@%" PRIx64,
>> + xive->tm_base + 3 * (1 << TM_SHIFT));
>> + _FDT(node = fdt_add_subnode(fdt, 0, nodename));
>> + g_free(nodename);
>> +
>> + _FDT(fdt_setprop_string(fdt, node, "device_type", "power-ivpe"));
>> + _FDT(fdt_setprop(fdt, node, "reg", timas, sizeof(timas)));
>> +
>> + _FDT(fdt_setprop_string(fdt, node, "compatible", "ibm,power-ivpe"));
>> + _FDT(fdt_setprop(fdt, node, "ibm,xive-eq-sizes", eq_sizes,
>> + sizeof(eq_sizes)));
>> + _FDT(fdt_setprop(fdt, node, "ibm,xive-lisn-ranges", lisn_ranges,
>> + sizeof(lisn_ranges)));
>> +
>> + /* For Linux to link the LSIs to the main interrupt controller.
>
> What's the "main interrupt controller" in this context?
There is only one. This is just how it is reference in the Linux code.
I will remove the comment.
>
>> + * These properties are not in XIVE exploitation mode sPAPR
>> + * specs
These properties have been added now.
>> + */
>> + _FDT(fdt_setprop(fdt, node, "interrupt-controller", NULL, 0));
>> + _FDT(fdt_setprop_cell(fdt, node, "#interrupt-cells", 2));
>> +
>> + /* For SLOF */
>> + _FDT(fdt_setprop_cell(fdt, node, "linux,phandle", phandle));
>> + _FDT(fdt_setprop_cell(fdt, node, "phandle", phandle));
>> +
>> + /* The "ibm,plat-res-int-priorities" property defines the priority
>> + * ranges reserved by the hypervisor
>> + */
>> + _FDT(fdt_setprop(fdt, 0, "ibm,plat-res-int-priorities",
>> + plat_res_int_priorities,
>> sizeof(plat_res_int_priorities)));
>> +}
>> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
>> index 9f8c19e56e7a..ad1692cdcd0f 100644
>> --- a/hw/ppc/spapr.c
>> +++ b/hw/ppc/spapr.c
>> @@ -1270,7 +1270,8 @@ static void *spapr_build_fdt(sPAPRMachineState *spapr,
>> _FDT(fdt_setprop_cell(fdt, 0, "#size-cells", 2));
>>
>> /* /interrupt controller */
>> - spapr_dt_xics(xics_max_server_number(spapr), fdt, PHANDLE_XICP);
>> + smc->irq->dt_populate(spapr, xics_max_server_number(spapr), fdt,
>> + PHANDLE_XICP);
>>
>> ret = spapr_populate_memory(spapr, fdt);
>> if (ret < 0) {
>> diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
>> index da6fcfaa3c52..d88a029d8c5c 100644
>> --- a/hw/ppc/spapr_irq.c
>> +++ b/hw/ppc/spapr_irq.c
>> @@ -190,6 +190,13 @@ static void spapr_irq_print_info_xics(sPAPRMachineState
>> *spapr, Monitor *mon)
>> ics_pic_print_info(spapr->ics, mon);
>> }
>>
>> +static void spapr_irq_dt_populate_xics(sPAPRMachineState *spapr,
>> + uint32_t nr_servers, void *fdt,
>> + uint32_t phandle)
>> +{
>> + spapr_dt_xics(nr_servers, fdt, phandle);
>> +}
>> +
>
> It'd be nicer to change the signature of spapr_dt_xics, rather than
> having this one line wrapper.
but this is a sPAPR IRQ method. So you would use spapr_dt_xics directly
for the definition of the backend ? if you prefer, it's fine with me.
>
>> #define SPAPR_IRQ_XICS_NR_IRQS 0x1000
>> #define SPAPR_IRQ_XICS_NR_MSIS \
>> (XICS_IRQ_BASE + SPAPR_IRQ_XICS_NR_IRQS - SPAPR_IRQ_MSI)
>> @@ -203,6 +210,7 @@ sPAPRIrq spapr_irq_xics = {
>> .free = spapr_irq_free_xics,
>> .qirq = spapr_qirq_xics,
>> .print_info = spapr_irq_print_info_xics,
>> + .dt_populate = spapr_irq_dt_populate_xics,
>> };
>>
>> /*
>> @@ -300,6 +308,13 @@ static void spapr_irq_print_info_xive(sPAPRMachineState
>> *spapr,
>> spapr_xive_pic_print_info(spapr->xive, mon);
>> }
>>
>> +static void spapr_irq_dt_populate_xive(sPAPRMachineState *spapr,
>> + uint32_t nr_servers, void *fdt,
>> + uint32_t phandle)
>> +{
>> + spapr_dt_xive(spapr->xive, nr_servers, fdt, phandle);
>
> Uh.. and to make the hook signature just match what we need rather
> than having to have trivial wrappers in both cases.
ok.
>
>> +}
>> +
>> /*
>> * XIVE uses the full IRQ number space. Set it to 8K to be compatible
>> * with XICS.
>> @@ -317,6 +332,7 @@ sPAPRIrq spapr_irq_xive = {
>> .free = spapr_irq_free_xive,
>> .qirq = spapr_qirq_xive,
>> .print_info = spapr_irq_print_info_xive,
>> + .dt_populate = spapr_irq_dt_populate_xive,
>> };
>>
>> /*
>> @@ -421,4 +437,5 @@ sPAPRIrq spapr_irq_xics_legacy = {
>> .free = spapr_irq_free_xics,
>> .qirq = spapr_qirq_xics,
>> .print_info = spapr_irq_print_info_xics,
>> + .dt_populate = spapr_irq_dt_populate_xics,
>> };
>
