On Wed, Nov 14, 2018 at 02:04:43PM +0800, Yu Zhang wrote: > A 5-level paging capable VM may choose to use 57-bit IOVA address width. > E.g. guest applications may prefer to use its VA as IOVA when performing > VFIO map/unmap operations, to avoid the burden of managing the IOVA space. > > This patch extends the current vIOMMU logic to cover the extended address > width. When creating a VM with 5-level paging feature, one can choose to > create a virtual VTD with 5-level paging capability, with configurations > like "-device intel-iommu,x-aw-bits=57". > > Signed-off-by: Yu Zhang <yu.c.zh...@linux.intel.com>
Reviewed-by: Peter Xu <pet...@redhat.com> -- Peter Xu
