On 12/11/2018 23:12, Alex Bennée wrote:
>
> Laurent Vivier <lviv...@redhat.com> writes:
>
>> On 29/06/2018 16:53, Peter Maydell wrote:
>>> From: Richard Henderson <richard.hender...@linaro.org>
>>>
>>> Enable ARM_FEATURE_SVE for the generic "max" cpu.
>>>
>>> Tested-by: Alex Bennée <alex.ben...@linaro.org>
>>> Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
>>> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
>>> Message-id: 20180627043328.11531-35-richard.hender...@linaro.org
>>> Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
>>> ---
>>> linux-user/elfload.c | 1 +
>>> target/arm/cpu.c | 7 +++++++
>>> target/arm/cpu64.c | 1 +
>>> 3 files changed, 9 insertions(+)
>>>
>>> diff --git a/linux-user/elfload.c b/linux-user/elfload.c
>>> index 13bc78d0c86..d1231ad07a3 100644
>>> --- a/linux-user/elfload.c
>>> +++ b/linux-user/elfload.c
>>> @@ -584,6 +584,7 @@ static uint32_t get_elf_hwcap(void)
>>> GET_FEATURE(ARM_FEATURE_V8_ATOMICS, ARM_HWCAP_A64_ATOMICS);
>>> GET_FEATURE(ARM_FEATURE_V8_RDM, ARM_HWCAP_A64_ASIMDRDM);
>>> GET_FEATURE(ARM_FEATURE_V8_FCMA, ARM_HWCAP_A64_FCMA);
>>> + GET_FEATURE(ARM_FEATURE_SVE, ARM_HWCAP_A64_SVE);
>>> #undef GET_FEATURE
>>>
>>> return hwcaps;
>>> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
>>> index 2ae4fffafb9..6dcc552e143 100644
>>> --- a/target/arm/cpu.c
>>> +++ b/target/arm/cpu.c
>>> @@ -164,6 +164,13 @@ static void arm_cpu_reset(CPUState *s)
>>> env->cp15.sctlr_el[1] |= SCTLR_UCT | SCTLR_UCI | SCTLR_DZE;
>>> /* and to the FP/Neon instructions */
>>> env->cp15.cpacr_el1 = deposit64(env->cp15.cpacr_el1, 20, 2, 3);
>>> + /* and to the SVE instructions */
>>> + env->cp15.cpacr_el1 = deposit64(env->cp15.cpacr_el1, 16, 2, 3);
>>> + env->cp15.cptr_el[3] |= CPTR_EZ;
>>> + /* with maximum vector length */
>>> + env->vfp.zcr_el[1] = ARM_MAX_VQ - 1;
>>> + env->vfp.zcr_el[2] = ARM_MAX_VQ - 1;
>>> + env->vfp.zcr_el[3] = ARM_MAX_VQ - 1;
>>> #else
>>> /* Reset into the highest available EL */
>>> if (arm_feature(env, ARM_FEATURE_EL3)) {
>>> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
>>> index c50dcd4077d..0360d7efc5e 100644
>>> --- a/target/arm/cpu64.c
>>> +++ b/target/arm/cpu64.c
>>> @@ -252,6 +252,7 @@ static void aarch64_max_initfn(Object *obj)
>>> set_feature(&cpu->env, ARM_FEATURE_V8_RDM);
>>> set_feature(&cpu->env, ARM_FEATURE_V8_FP16);
>>> set_feature(&cpu->env, ARM_FEATURE_V8_FCMA);
>>> + set_feature(&cpu->env, ARM_FEATURE_SVE);
>>> /* For usermode -cpu max we can use a larger and more efficient DCZ
>>> * blocksize since we don't have to follow what the hardware does.
>>> */
>>>
>>
>> Running some tests for my pull request, I've found this commit breaks
>> ltp-full-20180515 sigaltstack01 tests with ubuntu arm64/trusty.
>>
>> sigaltstack01 274 TBROK : tst_sig.c:233: unexpected signal
>> SIGIOT/SIGABRT(6) received (pid = 15241).
>> *** Error in `/opt/ltp/testcases/bin/sigaltstack01': free(): invalid
>> pointer: 0x000000000042a010 ***
>
> I wonder if that is the test case not handling the full frame size (or
> us not checking the allocated size). What syscall or signal delivery was
> happening at the time?
>
The signal is an abort() triggered by the libc.
But I think the first problem happens because memory is corrupted: it
crashes in the cleanup() function when the test is over and the memory
is freed.
#4149 <signal handler called>
#4150 __GI_abort () at abort.c:91
#4151 0x00000040008a1448 in __libc_message (do_abort=1,
fmt=fmt@entry=0x4000950cb0 "*** Error in `%s': %s: 0x%s ***\n")
at ../sysdeps/posix/libc_fatal.c:175
#4152 0x00000040008ab71c in malloc_printerr (action=1,
str=0x4000950ed8 "free(): invalid pointer", ptr=<optimized out>)
at malloc.c:4996
#4153 0x00000040008ac4f4 in _int_free (av=0x400097a560 <main_arena>,
p=<optimized out>, have_lock=0) at malloc.c:3840
#4154 0x0000000000403340 in cleanup () at sigaltstack01.c:236
#4155 main (ac=<optimized out>, av=<optimized out>) at sigaltstack01.c:165
233 void cleanup(void)
234 {
235
236 free(sigstk.ss_sp);
237
238 }
Thanks,
Laurent
