This patch updates vtd_lookup_iotlb() to search cached mappings only for all page levels supported by address width of current vIOMMU. Also, to cover 57-bit width, the shift of source id(VTD_IOTLB_SID_SHIFT) and of page level(VTD_IOTLB_LVL_SHIFT) are enlarged by 9 - the stride of one paging structure level.
Signed-off-by: Yu Zhang <yu.c.zh...@linux.intel.com> --- Cc: "Michael S. Tsirkin" <m...@redhat.com> Cc: Marcel Apfelbaum <marcel.apfelb...@gmail.com> Cc: Paolo Bonzini <pbonz...@redhat.com> Cc: Richard Henderson <r...@twiddle.net> Cc: Eduardo Habkost <ehabk...@redhat.com> Cc: Peter Xu <pet...@redhat.com> --- hw/i386/intel_iommu.c | 5 +++-- hw/i386/intel_iommu_internal.h | 7 ++----- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 9cdf755..ce7e17e 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -254,11 +254,12 @@ static uint64_t vtd_get_iotlb_gfn(hwaddr addr, uint32_t level) static VTDIOTLBEntry *vtd_lookup_iotlb(IntelIOMMUState *s, uint16_t source_id, hwaddr addr) { - VTDIOTLBEntry *entry; + VTDIOTLBEntry *entry = NULL; uint64_t key; int level; + int max_level = (s->aw_bits - VTD_PAGE_SHIFT_4K) / VTD_SL_LEVEL_BITS; - for (level = VTD_SL_PT_LEVEL; level < VTD_SL_PML4_LEVEL; level++) { + for (level = VTD_SL_PT_LEVEL; level < max_level; level++) { key = vtd_get_iotlb_key(vtd_get_iotlb_gfn(addr, level), source_id, level); entry = g_hash_table_lookup(s->iotlb, &key); diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index a7ef24b..bdf2b7c 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -114,8 +114,8 @@ VTD_INTERRUPT_ADDR_FIRST + 1) /* The shift of source_id in the key of IOTLB hash table */ -#define VTD_IOTLB_SID_SHIFT 36 -#define VTD_IOTLB_LVL_SHIFT 52 +#define VTD_IOTLB_SID_SHIFT 45 +#define VTD_IOTLB_LVL_SHIFT 61 #define VTD_IOTLB_MAX_SIZE 1024 /* Max size of the hash table */ /* IOTLB_REG */ @@ -450,9 +450,6 @@ typedef struct VTDRootEntry VTDRootEntry; #define VTD_SL_LEVEL_BITS 9 /* Second Level Paging Structure */ -#define VTD_SL_PML4_LEVEL 4 -#define VTD_SL_PDP_LEVEL 3 -#define VTD_SL_PD_LEVEL 2 #define VTD_SL_PT_LEVEL 1 #define VTD_SL_PT_ENTRY_NR 512 -- 1.9.1