On 10/19/18 2:06 AM, Emilio G. Cota wrote:
> @@ -60,7 +60,7 @@ static bool mips_cpu_has_work(CPUState *cs)
> /* Prior to MIPS Release 6 it is implementation dependent if non-enabled
> interrupts wake-up the CPU, however most of the implementations only
> check for interrupts that can be taken. */
> - if ((cs->interrupt_request & CPU_INTERRUPT_HARD) &&
> + if ((cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD) &&
> cpu_mips_hw_interrupts_pending(env)) {
> if (cpu_mips_hw_interrupts_enabled(env) ||
> (env->insn_flags & ISA_MIPS32R6)) {
> @@ -72,7 +72,7 @@ static bool mips_cpu_has_work(CPUState *cs)
> if (env->CP0_Config3 & (1 << CP0C3_MT)) {
> /* The QEMU model will issue an _WAKE request whenever the CPUs
> should be woken up. */
> - if (cs->interrupt_request & CPU_INTERRUPT_WAKE) {
> + if (cpu_interrupt_request(cs) & CPU_INTERRUPT_WAKE) {
> has_work = true;
> }
>
> @@ -82,7 +82,7 @@ static bool mips_cpu_has_work(CPUState *cs)
> }
> /* MIPS Release 6 has the ability to halt the CPU. */
> if (env->CP0_Config5 & (1 << CP0C5_VP)) {
> - if (cs->interrupt_request & CPU_INTERRUPT_WAKE) {
> + if (cpu_interrupt_request(cs) & CPU_INTERRUPT_WAKE) {
> has_work = true;
> }
> if (!mips_vp_active(env)) {
Multiple calls.
r~
