On 10/12/18 7:42 AM, Peter Maydell wrote:
> For the v7 version of the Arm architecture, the IL bit in
> syndrome register values where the field is not valid was
> defined to be UNK/SBZP. In v8 this is RES1, which is what
> QEMU currently implements. Handle the desired v7 behaviour
> by squashing the IL bit for the affected cases:
> * EC == EC_UNCATEGORIZED
> * prefetch aborts
> * data aborts where ISV is 0
>
> (The fourth case listed in the v8 Arm ARM DDI 0487C.a in
> section G7.2.70, "illegal state exception", can't happen
> on a v7 CPU.)
>
> This deals with a corner case noted in a comment.
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
> if (cs->exception_index != EXCP_IRQ && cs->exception_index != EXCP_FIQ) {
> +
> + if (!arm_feature(env, ARM_FEATURE_V8)) {
Extra line.
r~
