On Thu, Feb 24, 2011 at 06:57:05PM +0100, Juan Quintela wrote:
> Signed-off-by: Juan Quintela <quint...@redhat.com>
> ---
> hw/hw.h | 8 ++++++++
> 1 files changed, 8 insertions(+), 0 deletions(-)
>
> diff --git a/hw/hw.h b/hw/hw.h
> index 0dfc053..f874dd0 100644
> --- a/hw/hw.h
> +++ b/hw/hw.h
> @@ -609,6 +609,14 @@ extern const VMStateDescription vmstate_pci_device;
> .offset = vmstate_offset_value(_state, _field, PCIDevice), \
> }
>
> +#define VMSTATE_PCI_DEVICE_POINTER(_field, _state) { \
> + .name = (stringify(_field)), \
> + .size = sizeof(PCIDevice), \
> + .vmsd = &vmstate_pci_device, \
> + .flags = VMS_STRUCT|VMS_POINTER, \
> + .offset = vmstate_offset_pointer(_state, _field, PCIDevice), \
> +}
> +
> extern const VMStateDescription vmstate_pcie_device;
>
> #define VMSTATE_PCIE_DEVICE(_field, _state) { \
> --
> 1.7.4
There are only two users and it would be better to embedded PCIDevice
Something like this. I did only compile test.
thanks,
diff --git a/hw/ppc4xx_pci.c b/hw/ppc4xx_pci.c
index f62f1f9..fc76cf7 100644
--- a/hw/ppc4xx_pci.c
+++ b/hw/ppc4xx_pci.c
@@ -48,11 +48,11 @@ struct PCITargetMap {
#define PPC4xx_PCI_NR_PTMS 2
struct PPC4xxPCIState {
+ PCIDevice pci_dev;
struct PCIMasterMap pmm[PPC4xx_PCI_NR_PMMS];
struct PCITargetMap ptm[PPC4xx_PCI_NR_PTMS];
PCIHostState pci_state;
- PCIDevice *pci_dev;
};
typedef struct PPC4xxPCIState PPC4xxPCIState;
@@ -290,7 +290,7 @@ static void ppc4xx_pci_save(QEMUFile *f, void *opaque)
PPC4xxPCIState *controller = opaque;
int i;
- pci_device_save(controller->pci_dev, f);
+ pci_device_save(&controller->pci_dev, f);
for (i = 0; i < PPC4xx_PCI_NR_PMMS; i++) {
qemu_put_be32s(f, &controller->pmm[i].la);
@@ -313,7 +313,7 @@ static int ppc4xx_pci_load(QEMUFile *f, void *opaque, int
version_id)
if (version_id != 1)
return -EINVAL;
- pci_device_load(controller->pci_dev, f);
+ pci_device_load(&controller->pci_dev, f);
for (i = 0; i < PPC4xx_PCI_NR_PMMS; i++) {
qemu_get_be32s(f, &controller->pmm[i].la);
@@ -337,22 +337,22 @@ PCIBus *ppc4xx_pci_init(CPUState *env, qemu_irq
pci_irqs[4],
target_phys_addr_t special_cycle,
target_phys_addr_t registers)
{
+ PCIBus *pci_bus;
+ PCIDevice *pci_dev;
PPC4xxPCIState *controller;
int index;
static int ppc4xx_pci_id;
uint8_t *pci_conf;
- controller = qemu_mallocz(sizeof(PPC4xxPCIState));
+ pci_bus = pci_register_bus(NULL, "pci",
+ ppc4xx_pci_set_irq, ppc4xx_pci_map_irq,
+ pci_irqs, 0, 4);
- controller->pci_state.bus = pci_register_bus(NULL, "pci",
- ppc4xx_pci_set_irq,
- ppc4xx_pci_map_irq,
- pci_irqs, 0, 4);
+ pci_dev = pci_register_device(pci_bus, "host bridge",
+ sizeof(PPC4xxPCIState), 0, NULL, NULL);
+ controller = DO_UPCAST(PPC4xxPCIState, pci_dev, pci_dev);
- controller->pci_dev = pci_register_device(controller->pci_state.bus,
- "host bridge", sizeof(PCIDevice),
- 0, NULL, NULL);
- pci_conf = controller->pci_dev->config;
+ pci_conf = controller->pci_dev.config;
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_IBM);
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_IBM_440GX);
pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_OTHER);
@@ -381,7 +381,7 @@ PCIBus *ppc4xx_pci_init(CPUState *env, qemu_irq pci_irqs[4],
qemu_register_reset(ppc4xx_pci_reset, controller);
/* XXX load/save code not tested. */
- register_savevm(&controller->pci_dev->qdev, "ppc4xx_pci", ppc4xx_pci_id++,
+ register_savevm(&controller->pci_dev.qdev, "ppc4xx_pci", ppc4xx_pci_id++,
1, ppc4xx_pci_save, ppc4xx_pci_load, controller);
return controller->pci_state.bus;
diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c
index 11edd03..eb88a59 100644
--- a/hw/ppce500_pci.c
+++ b/hw/ppce500_pci.c
@@ -73,11 +73,11 @@ struct pci_inbound {
};
struct PPCE500PCIState {
+ PCIDevice pci_dev;
struct pci_outbound pob[PPCE500_PCI_NR_POBS];
struct pci_inbound pib[PPCE500_PCI_NR_PIBS];
uint32_t gasket_time;
PCIHostState pci_state;
- PCIDevice *pci_dev;
};
typedef struct PPCE500PCIState PPCE500PCIState;
@@ -221,7 +221,7 @@ static void ppce500_pci_save(QEMUFile *f, void *opaque)
PPCE500PCIState *controller = opaque;
int i;
- pci_device_save(controller->pci_dev, f);
+ pci_device_save(&controller->pci_dev, f);
for (i = 0; i < PPCE500_PCI_NR_POBS; i++) {
qemu_put_be32s(f, &controller->pob[i].potar);
@@ -247,7 +247,7 @@ static int ppce500_pci_load(QEMUFile *f, void *opaque, int
version_id)
if (version_id != 1)
return -EINVAL;
- pci_device_load(controller->pci_dev, f);
+ pci_device_load(&controller->pci_dev, f);
for (i = 0; i < PPCE500_PCI_NR_POBS; i++) {
qemu_get_be32s(f, &controller->pob[i].potar);
@@ -269,28 +269,24 @@ static int ppce500_pci_load(QEMUFile *f, void *opaque,
int version_id)
PCIBus *ppce500_pci_init(qemu_irq pci_irqs[4], target_phys_addr_t registers)
{
+ PCIBus *pci_bus;
PPCE500PCIState *controller;
PCIDevice *d;
int index;
static int ppce500_pci_id;
- controller = qemu_mallocz(sizeof(PPCE500PCIState));
-
- controller->pci_state.bus = pci_register_bus(NULL, "pci",
- mpc85xx_pci_set_irq,
- mpc85xx_pci_map_irq,
- pci_irqs, PCI_DEVFN(0x11, 0),
- 4);
- d = pci_register_device(controller->pci_state.bus,
- "host bridge", sizeof(PCIDevice),
+ pci_bus = pci_register_bus(NULL, "pci",
+ mpc85xx_pci_set_irq, mpc85xx_pci_map_irq,
+ pci_irqs, PCI_DEVFN(0x11, 0), 4);
+ d = pci_register_device(pci_bus, "host bridge", sizeof(PPCE500PCIState),
0, NULL, NULL);
+ controller = DO_UPCAST(PPCE500PCIState, pci_dev, d);
+ controller->pci_state.bus = pci_bus;
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_FREESCALE);
pci_config_set_device_id(d->config, PCI_DEVICE_ID_MPC8533E);
pci_config_set_class(d->config, PCI_CLASS_PROCESSOR_POWERPC);
- controller->pci_dev = d;
-
/* CFGADDR */
index = pci_host_conf_register_mmio(&controller->pci_state,
DEVICE_BIG_ENDIAN);
--
yamahata
