Signed-off-by: Juan Quintela <quint...@redhat.com>
---
hw/pxa2xx_pic.c | 52 ++++++++++++++++++++--------------------------------
1 files changed, 20 insertions(+), 32 deletions(-)
diff --git a/hw/pxa2xx_pic.c b/hw/pxa2xx_pic.c
index a36da23..d1015ab 100644
--- a/hw/pxa2xx_pic.c
+++ b/hw/pxa2xx_pic.c
@@ -241,41 +241,30 @@ static CPUWriteMemoryFunc * const pxa2xx_pic_writefn[] = {
pxa2xx_pic_mem_write,
};
-static void pxa2xx_pic_save(QEMUFile *f, void *opaque)
+static int pxa2xx_pic_post_load(void *opaque, int version_id)
{
- PXA2xxPICState *s = (PXA2xxPICState *) opaque;
- int i;
-
- for (i = 0; i < 2; i ++)
- qemu_put_be32s(f, &s->int_enabled[i]);
- for (i = 0; i < 2; i ++)
- qemu_put_be32s(f, &s->int_pending[i]);
- for (i = 0; i < 2; i ++)
- qemu_put_be32s(f, &s->is_fiq[i]);
- qemu_put_be32s(f, &s->int_idle);
- for (i = 0; i < PXA2XX_PIC_SRCS; i ++)
- qemu_put_be32s(f, &s->priority[i]);
-}
-
-static int pxa2xx_pic_load(QEMUFile *f, void *opaque, int version_id)
-{
- PXA2xxPICState *s = (PXA2xxPICState *) opaque;
- int i;
-
- for (i = 0; i < 2; i ++)
- qemu_get_be32s(f, &s->int_enabled[i]);
- for (i = 0; i < 2; i ++)
- qemu_get_be32s(f, &s->int_pending[i]);
- for (i = 0; i < 2; i ++)
- qemu_get_be32s(f, &s->is_fiq[i]);
- qemu_get_be32s(f, &s->int_idle);
- for (i = 0; i < PXA2XX_PIC_SRCS; i ++)
- qemu_get_be32s(f, &s->priority[i]);
+ PXA2xxPICState *s = opaque;
- pxa2xx_pic_update(opaque);
+ pxa2xx_pic_update(s);
return 0;
}
+static const VMStateDescription vmstate_pxa2xx_pic = {
+ .name = "pxa2xx_mmci",
+ .version_id = 0,
+ .minimum_version_id = 0,
+ .minimum_version_id_old = 0,
+ .post_load = pxa2xx_pic_post_load,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT32_ARRAY(int_enabled, PXA2xxPICState, 2),
+ VMSTATE_UINT32_ARRAY(int_pending, PXA2xxPICState, 2),
+ VMSTATE_UINT32_ARRAY(is_fiq, PXA2xxPICState, 2),
+ VMSTATE_UINT32(int_idle, PXA2xxPICState),
+ VMSTATE_UINT32_ARRAY(priority, PXA2xxPICState, PXA2XX_PIC_SRCS),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
qemu_irq *pxa2xx_pic_init(target_phys_addr_t base, CPUState *env)
{
PXA2xxPICState *s;
@@ -306,8 +295,7 @@ qemu_irq *pxa2xx_pic_init(target_phys_addr_t base, CPUState
*env)
/* Enable IC coprocessor access. */
cpu_arm_set_cp_io(env, 6, pxa2xx_pic_cp_read, pxa2xx_pic_cp_write, s);
- register_savevm(NULL, "pxa2xx_pic", 0, 0, pxa2xx_pic_save,
- pxa2xx_pic_load, s);
+ vmstate_register(NULL, 0, &vmstate_pxa2xx_pic, s);
return qi;
}
--
1.7.4
