Hi Aleksandar and Stefan,
On 04/10/2018 14:34, Aleksandar Markovic wrote:
> From: Stefan Markovic <smarko...@wavecomp.com>
>
> Add DSP R3 ASE related bit definition for insn_flags and hflags.
>
> Signed-off-by: Aleksandar Markovic <amarko...@wavecomp.com>
> ---
> target/mips/cpu.h | 1 +
> target/mips/mips-defs.h | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/target/mips/cpu.h b/target/mips/cpu.h
> index 28af4d1..4160699 100644
> --- a/target/mips/cpu.h
> +++ b/target/mips/cpu.h
> @@ -598,6 +598,7 @@ struct CPUMIPSState {
> /* MIPS DSP resources access. */
> #define MIPS_HFLAG_DSP 0x080000 /* Enable access to MIPS DSP resources. */
> #define MIPS_HFLAG_DSPR2 0x100000 /* Enable access to MIPS DSPR2 resources.
> */
> +#define MIPS_HFLAG_DSPR3 0x20000000 /* Enable access to MIPS DSPR3
> resources.*/
I find it confusing to add this in the middle (rather that at the end)
of this list. It looks also bug prone, if someone add another definition
at the end of the list he might use the same value.
> /* Extra flag about HWREna register. */
> #define MIPS_HFLAG_HWRENA_ULR 0x200000 /* ULR bit from HWREna is set. */
> #define MIPS_HFLAG_SBRI 0x400000 /* R6 SDBBP causes RI excpt. in user mode
> */
> diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h
> index c8e9979..b27b7ae 100644
> --- a/target/mips/mips-defs.h
> +++ b/target/mips/mips-defs.h
> @@ -47,6 +47,7 @@
> #define ASE_MDMX 0x00040000
> #define ASE_DSP 0x00080000
> #define ASE_DSPR2 0x00100000
> +#define ASE_DSPR3 0x02000000
Ditto.
> #define ASE_MT 0x00200000
> #define ASE_SMARTMIPS 0x00400000
> #define ASE_MICROMIPS 0x00800000
What about adding this patch on top of the "mips: Clean the 'insn_flags'
namespace" patch which use your suggestion and let available space for
this ASE flag?
https://lists.gnu.org/archive/html/qemu-devel/2018-09/msg04070.html
Thanks,
Phil.
