> > I think some of the previously-implemented similar cases involving > > read-only bits were handled the same way, and we just built on that. What > > would you suggest as a more appropriate solution in such cases (of > > accessing "preset by hardware" bits)? > > Well, ctx->insn_flags and ctx->CP0_Config1 are good examples. > These are 100% read-only and fixed at cpu instantiation. > > I see that CP0_Config3 has one writable bit for micromips, but > is fully readonly for nanomips. Therefore XNP and MT need not > be copied to hflags because they will never vary. > > I'd suggest copying CP0_Config3 to ctx as with Config1. > > > r~
Hi, Richard, We ended up implementing this feature the way you suggested in the v11. Sorry about snafu. Regards, Aleksandar
