Le 08/20/2018 à 10:53 AM, Peter Maydell a écrit :
On 20 August 2018 at 09:49, KONRAD Frederic <frederic.kon...@adacore.com> wrote:
Le 08/17/2018 à 01:46 PM, Peter Maydell a écrit :
We now support direct execution from MMIO regions in the
core memory subsystem. This means that we don't need to
have device-specific support for it, and we can remove
the request_ptr handling from the Xilinx SPIPS device.
(It was broken anyway due to race conditions, and disabled
by default.)
This device is the only in-tree user of this API.
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
---
hw/ssi/xilinx_spips.c | 46 -------------------------------------------
1 file changed, 46 deletions(-)
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index c052bfc4b3c..16f88f74029 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -1031,14 +1031,6 @@ static const MemoryRegionOps spips_ops = {
static void xilinx_qspips_invalidate_mmio_ptr(XilinxQSPIPS *q)
I'd drop this function and replace the calls by
q->lqspi_cached_addr = ~0ULL;
I thought about that but decided it was reasonable to keep
the function, because it matches with having a
lqspi_load_cache() function still.
Right ok.
Thanks,
Fred
thanks
-- PMM
