Is it possible to instantiate multiple CPUs of different architectures and simuate them with different images at the same time? Some examples include ARM socs with m3/m4 coprocessor core but also boards with multiple processors where it is desirable to connect the chips over for example virtual SPI or UART and then simulate the composite system as a single machine where each of the cores runs a separate firmware.
Is something like this easy to implement given current processor objects or does this require substantial changes to how qemu works? One area I do not fully understand is native code generator and whether it would be able to cope with two cores of *different* architectures at the same time.
