From: Aleksandar Markovic <amarko...@wavecomp.com>
Add ISA_NANOMIPS32 and CPU_NANOMIPS32 preprocessor constants.
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Signed-off-by: Yongbok Kim <yongbok....@mips.com>
Signed-off-by: Aleksandar Markovic <amarko...@wavecomp.com>
Signed-off-by: Stefan Markovic <smarko...@wavecomp.com>
---
target/mips/mips-defs.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h
index d239069..c8e9979 100644
--- a/target/mips/mips-defs.h
+++ b/target/mips/mips-defs.h
@@ -39,6 +39,7 @@
#define ISA_MIPS64R5 0x00001000
#define ISA_MIPS32R6 0x00002000
#define ISA_MIPS64R6 0x00004000
+#define ISA_NANOMIPS32 0x00008000
/* MIPS ASEs. */
#define ASE_MIPS16 0x00010000
@@ -87,6 +88,9 @@
#define CPU_MIPS32R6 (CPU_MIPS32R5 | ISA_MIPS32R6)
#define CPU_MIPS64R6 (CPU_MIPS64R5 | CPU_MIPS32R6 | ISA_MIPS64R6)
+/* Wave Computing: "nanoMIPS" */
+#define CPU_NANOMIPS32 (CPU_MIPS32R6 | ISA_NANOMIPS32)
+
/* Strictly follow the architecture standard:
- Disallow "special" instruction handling for PMON/SPIM.
Note that we still maintain Count/Compare to match the host clock. */
--
2.7.4
