On 08/16/2018 07:57 AM, Aleksandar Markovic wrote: > From: Aleksandar Rikalo <arik...@wavecomp.com> > > Implement support for nanoMIPS LLWP/SCWP instructions. Beside > adding core functionality of these instructions, this patch adds > support for availability control via configuration bit XNP. > > Reviewed-by: Aleksandar Markovic <amarko...@wavecomp.com> > Signed-off-by: Dimitrije Nikolic <dniko...@wavecomp.com> > Signed-off-by: Aleksandar Markovic <amarko...@wavecomp.com> > Signed-off-by: Stefan Markovic <smarko...@wavecomp.com> > --- > linux-user/mips/cpu_loop.c | 25 +++++++++++--- > target/mips/cpu.h | 5 ++- > target/mips/internal.h | 5 ++- > target/mips/translate.c | 86 > ++++++++++++++++++++++++++++++++++++++++++++++ > 4 files changed, 114 insertions(+), 7 deletions(-)
Probably all of the linux-user/ changes are moot. But we should simply clean that up all at once when converting the whole mips target to tcg_gen_atomic_*. Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
