> From: Richard Henderson <richard.hender...@linaro.org>
> Sent: Thursday, August 16, 2018 6:31 PM
>
> Subject: Re: [PATCH v9 39/84] target/mips: Add emulation of nanoMIPS 32-bit
> branch instructions
>
> On 08/16/2018 07:57 AM, Aleksandar Markovic wrote:
> > + } else {
> > + /* Conditional compact branch */
> > + TCGLabel *fs = gen_new_label();
> > + save_cpu_state(ctx, 0);
>
> I will note that save_cpu_state(ctx, 0) is concerned about updating the BMASK
> bits for branch delay slots, which nanomips does not have. The function could
> probably usefully be renamed so that's clearer.
>
This and other similar cases will be fixed in v10. Perhaps even the naming of
save_cpu_state().
>
> > case NM_P_J:
> > + switch (extract32(ctx->opcode, 12, 4)) {
> > + case NM_JALRC:
> > + case NM_JALRC_HB:
> > + gen_compute_branch(ctx, OPC_JALR, 4, rs, rt, 0, 0);
> > + break;
>
> All of these branches need to be using the new functions that you just added.
> There are even more incorrect uses to follow.
>
All occurrences will be fixed in v10.
