On 16 February 2011 14:51, <christophe.l...@st.com> wrote:
Your corner case handling isn't quite right, I'm afraid.
> float32 HELPER(recpe_f32)(float32 a, CPUState *env)
> {
> - float_status *s = &env->vfp.fp_status;
> - float32 one = int32_to_float32(1, s);
> - return float32_div(one, a, s);
> + float_status *s = &env->vfp.standard_fp_status;
> + float64 f64;
> + uint32_t val32 = float32_val(a);
> +
> + int result_exp;
> + int a_exp = (val32 & 0x7F800000) >> 23;
> + int sign = val32 & 0x80000000;
> +
> + if (float32_is_any_nan(a)) {
> + return float32_maybe_silence_nan(a);
This won't give the right answer for NaNs: we should be
returning the default NaN (since this is a Neon op
and uses the standard FPSCR value), but
maybe_silence_nan() will return the input NaN
with the QNaN bit set.
> + } else if (float32_is_infinity(a)) {
> + return float32_zero;
This will return +0 for an input of -inf, when
it should be -0.
> + } else if (float32_is_zero(a)) {
> + float_raise(float_flag_divbyzero, s);
> + return float32_infinity;
Return value for -0 should be -inf, not +inf.
Also you want the float32_is_zero_or_denormal()
function, since we know that denormals must be
flushed to zero (standard FPSCR again).
> + } else if (a_exp >= 253) {
> + float_raise(float_flag_underflow, s);
> + return float32_zero;
The ARM ARM says "underflows to zero of correct sign",
not always +0.
-- PMM
