On 08/09/2018 02:43 PM, Emilio G. Cota wrote: > diff --git a/target/riscv/translate.c b/target/riscv/translate.c > index 66a80ca772..98e0311606 100644 > --- a/target/riscv/translate.c > +++ b/target/riscv/translate.c > @@ -1872,7 +1872,7 @@ static void riscv_tr_tb_stop(DisasContextBase *dcbase, > CPUState *cpu) > if (ctx->base.singlestep_enabled) { > gen_exception_debug(); > } else { > - tcg_gen_exit_tb(NULL, 0); > + tcg_gen_lookup_and_goto_ptr(); > } > break; > case DISAS_NORETURN:
This could just as easily use case DISAS_TOO_MANY: gen_goto_tb(ctx, 0, ctx->base.pc_next); r~