> Something like
>
> unsigned opc = extract32(ctx->opcode, 7, 4);
> TCGMemOp mop;
>
> switch (opc) {
> case NM_LBX:
> mop = MO_SB;
> break;
> ...
> }
> mop |= ctx->default_tcg_memop_mask;
>
> if (extract32(ctx->opcode, 6, 1)) {
> tcg_gen_shli_tl(t0, t0, mop & MO_SIZE);
> }
> gen_op_addr_add(ctx, t0, t0, t1);
>
> switch (opc) {
> case NM_LBX: // and all other integer loads
> tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx, mop);
> gen_store_gpr(t0, rd);
> break;
> case NM_SBX: // and all other integer stores
> gen_load_gpr(t1, td);
> tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx, mop);
> break;
> case NM_LWC1X: // and all other fp ops
> if (ctx->CP0_Config1...) {
> ...
> }
> }
We plan to do this this way, but this will not be ready for v6, since it is
deemed low priority (there is no bug in emulator behavior related to this code
segment).
Regards,
Aleksandar
