From: James Hogan <james.ho...@mips.com>
We shouldn't set the ISA bit in CP0_EPC for nanoMIPS.
Signed-off-by: James Hogan <james.ho...@mips.com>
Signed-off-by: Yongbok Kim <yongbok....@mips.com>
Signed-off-by: Aleksandar Markovic <amarko...@wavecomp.com>
Signed-off-by: Stefan Markovic <smarko...@wavecomp.com>
---
target/mips/helper.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/mips/helper.c b/target/mips/helper.c
index a576fa4..371fecf 100644
--- a/target/mips/helper.c
+++ b/target/mips/helper.c
@@ -656,7 +656,8 @@ target_ulong exception_resume_pc (CPUMIPSState *env)
target_ulong bad_pc;
target_ulong isa_mode;
- isa_mode = !!(env->hflags & MIPS_HFLAG_M16);
+ isa_mode = env->hflags & MIPS_HFLAG_M16 &&
+ !(env->insn_flags & ISA_NANOMIPS32);
bad_pc = env->active_tc.PC | isa_mode;
if (env->hflags & MIPS_HFLAG_BMASK) {
/* If the exception was raised from a delay slot, come back to
--
2.7.4
