On 16 July 2018 at 23:23, Guenter Roeck <li...@roeck-us.net> wrote: > Writes in PIO mode have two requirements: > > - A data interrupt must be generated after a write command has been > issued to indicate that the chip is ready to receive data. > - A block interrupt must be generated after each block to indicate > that the chip is ready to receive the next data block. > > Rearrange the code to make this happen. Tested on raspi3 (in PIO mode) > and raspi2 (in DMA mode). > > Signed-off-by: Guenter Roeck <li...@roeck-us.net> > ---
As you say, all still a bit guesswork, but this doesn't break my previously-working raspi3 kernel and it looks plausible (especially the separation of "is_read" and "is_write" rather than assuming everything not a read is a write). Applied to target-arm.next for the next 3.0 rc. thanks -- PMM
