On 04/07/2018 21:37, Paolo Bonzini wrote:
> On 04/07/2018 15:21, Jingqi Liu wrote:
> > The MSR (33H) controls support for #AC exception for split locked
> > accesses. When bit 29 of the MSR (33H) is set, the processor causes an
> > #AC exception to be issued instead of suppressing LOCK on bus (during
> > split lock access).
> >
> > Signed-off-by: Jingqi Liu <jingqi....@intel.com>
> > ---
> > target/i386/cpu.h | 2 ++
> > target/i386/kvm.c | 13 +++++++++++++
> > target/i386/machine.c | 20 ++++++++++++++++++++
> > 3 files changed, 35 insertions(+)
> >
> > diff --git a/target/i386/cpu.h b/target/i386/cpu.h index
> > 8eaefee..9728552 100644
> > --- a/target/i386/cpu.h
> > +++ b/target/i386/cpu.h
> > @@ -348,6 +348,7 @@ typedef enum X86Seg {
> > #define MSR_IA32_APICBASE_ENABLE (1<<11)
> > #define MSR_IA32_APICBASE_EXTD (1 << 10)
> > #define MSR_IA32_APICBASE_BASE (0xfffffU<<12)
> > +#define MSR_SPLIT_LOCK_CTRL 0x00000033
> > #define MSR_IA32_FEATURE_CONTROL 0x0000003a
> > #define MSR_TSC_ADJUST 0x0000003b
> > #define MSR_IA32_SPEC_CTRL 0x48
> > @@ -1209,6 +1210,7 @@ typedef struct CPUX86State {
> > uint32_t pkru;
> >
> > uint64_t spec_ctrl;
> > + uint64_t split_lock_ctrl;
>
> Please call everything MSR_TEST_CTL or test_ctl. Yes, it's a horrible name,
> but if
> that's what the manual calls it, we should do the same.
>
Hi Paolo,
Sure. I will unify the name in next version.
Thanks,
Jingqi
> Thanks,
>
> Paolo
>
