On Tue, Jul 03, 2018 at 03:35:13PM +0800, Robert Hoo wrote: > On Thu, 2018-06-28 at 15:28 -0300, Eduardo Habkost wrote: > > On Wed, Jun 27, 2018 at 07:27:21PM +0800, Robert Hoo wrote: > > > Support of IA32_PRED_CMD MSR already be enumerated by same CPUID bit as > > > SPEC_CTRL. > > > > > > Signed-off-by: Robert Hoo <robert...@linux.intel.com> > > > > Based on kernel commit 1eaafe91, it looks like we must always set > > IA32_ARCH_CAPABILITIES.RSBA[bit 2] unless we're really sure the > > VM will not be migrated to a vulnerable processor. > > > > Considering this, I'd like to make "+arch-capabilities" set > > IA32_ARCH_CAPABILITIES.RSBA by default, unless RSBA is explicitly > > disabled by management software. > > > Agree. But this seems beyond Icelake CPU model scope. How about I think > about this carefully and compose another patch (set) for this?
This plan makes sense to me, as I don't want to make this decision block IceLake from being in QEMU 3.0. However, enabling CPUID_7_0_EDX_ARCH_CAPABILITIES in IceLake but setting the MSR to 0 seems pointless. I think we should add IceLake without CPUID_7_0_EDX_ARCH_CAPABILITIES first, and later (after deciding on a reasonable default value for MSR_IA32_ARCH_CAPABILITIES), enable the CPUID bit on IceLake (hopefully in time for QEMU 3.0). > And you'd like to set IA32_ARCH_CAPABILITIES.RSBA by default in qemu or > kvm layer? Probably we need to make this decision in QEMU. If KVM set RSBA automatically on .get_msr_feature(), QEMU won't be able to differentiate a host with RSBA set from a host with RSBA unset. -- Eduardo
