On Wed, Jun 27, 2018 at 06:50:18AM -0700, Richard Henderson wrote: > On 06/27/2018 05:59 AM, Stafford Horne wrote: > > The index is negative... this patch should fix that. > > > > @@ -78,6 +78,7 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong > > spr, > > target_ulong rb) > > case TO_SPR(0, 1024) ... TO_SPR(0, 1024 + (16 * 32)): /* Shadow GPRs */ > > idx = (spr - 1024); > > env->shadow_gpr[idx / 32][idx % 32] = rb; > > + break; > > > > case TO_SPR(1, 512) ... TO_SPR(1, 512 + TLB_SIZE - 1): /* DTLBW0MR > > 0-127 */ > > OMG. That's embarrasing...
Yes, I thought so too, it's my bug. I am little surprised it didn't cause issues before. I am still getting failures on SMP, this time the kernel is jumping to some unknown address, maybe an itlb issue, I will continue to debug. Bisecting it is exposing some other issues (the mmu handlers were not getting init'd during one point in time). -Stafford