From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com>
Add the Cortex-R5F with the optional FPU enabled.
Reviewed-by: KONRAD Frederic <frederic.kon...@adacore.com>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4...@amsat.org>
Signed-off-by: Edgar E. Iglesias <edgar.igles...@xilinx.com>
Message-id: 20180529124707.3025-2-edgar.igles...@gmail.com
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
---
target/arm/cpu.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index e1de45e904c..81c1d22b143 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1361,6 +1361,14 @@ static void cortex_r5_initfn(Object *obj)
define_arm_cp_regs(cpu, cortexr5_cp_reginfo);
}
+static void cortex_r5f_initfn(Object *obj)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+
+ cortex_r5_initfn(obj);
+ set_feature(&cpu->env, ARM_FEATURE_VFP3);
+}
+
static const ARMCPRegInfo cortexa8_cp_reginfo[] = {
{ .name = "L2LOCKDOWN", .cp = 15, .crn = 9, .crm = 0, .opc1 = 1, .opc2 = 0,
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
@@ -1821,6 +1829,7 @@ static const ARMCPUInfo arm_cpus[] = {
{ .name = "cortex-m33", .initfn = cortex_m33_initfn,
.class_init = arm_v7m_class_init },
{ .name = "cortex-r5", .initfn = cortex_r5_initfn },
+ { .name = "cortex-r5f", .initfn = cortex_r5f_initfn },
{ .name = "cortex-a7", .initfn = cortex_a7_initfn },
{ .name = "cortex-a8", .initfn = cortex_a8_initfn },
{ .name = "cortex-a9", .initfn = cortex_a9_initfn },
--
2.17.1
