Hi Leandro, You seem to be a newcomer to QEMU development. Welcome ! :)
Please find a few remarks below, so that you can improve your patch submission skills. First, it is good practice to provide the subsystem name in the subject, as stated in: https://wiki.qemu.org/Contribute/SubmitAPatch#Write_a_meaningful_commit_message ie, [PATCH] target/ppc: Allow PIR read in privileged mode Then, this is your second shot for this patch, so you should have added: - a version tag, as stated in: https://wiki.qemu.org/Contribute/SubmitAPatch#When_resending_patches_add_a_version_tag ie, [PATCH v2] target/ppc: Allow PIR read in privileged mode - a summary of changes since previous versions, as stated in: https://wiki.qemu.org/Contribute/SubmitAPatch#Include_version_history_in_patchset_revisions ie, Signed-off-by: Leandro Lupori <leandro.lup...@gmail.com> Reviewed-by: Jose Ricardo Ziviani <jos...@linux.ibm.com> --- Changes in v2: - added my Signed-off-by, maintainers CC and Jose's Reviewed-by tags Pay attention that this summary of changes MUST be added below the '---', because it is only relevant for the review process and we don't want to record in the git changelog. On Mon, 7 May 2018 10:48:06 -0300 luporl <leandro.lup...@gmail.com> wrote: > According to PowerISA, the PIR register should be readable in privileged > mode also, not only in hypervisor privileged mode. > True. PowerISA 3.0 - 4.3.3 Processor Identification Register "Read access to the PIR is privileged; write access is not provided." > Cc: David Gibson <da...@gibson.dropbear.id.au> > Cc: Alexander Graf <ag...@suse.de> > Cc: qemu-...@nongnu.org > Signed-off-by: Leandro Lupori <leandro.lup...@gmail.com> > Reviewed-by: Jose Ricardo Ziviani <jos...@linux.ibm.com> > --- Reviewed-by: Greg Kurz <gr...@kaod.org> > target/ppc/translate_init.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c > index a72be6d121..7b56e3ffb9 100644 > --- a/target/ppc/translate_init.c > +++ b/target/ppc/translate_init.c > @@ -7816,7 +7816,7 @@ static void gen_spr_book3s_ids(CPUPPCState *env) > /* Processor identification */ > spr_register_hv(env, SPR_PIR, "PIR", > SPR_NOACCESS, SPR_NOACCESS, > - SPR_NOACCESS, SPR_NOACCESS, > + &spr_read_generic, SPR_NOACCESS, > &spr_read_generic, NULL, > 0x00000000); > spr_register_hv(env, SPR_HID0, "HID0",
