On Thu, May 03, 2018 at 09:54:01PM +0000, Alistair Francis wrote:
> On Thu, May 3, 2018 at 2:44 AM Edgar E. Iglesias <edgar.igles...@gmail.com>
> wrote:
>
> > From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com>
>
> > Prepare for 64-bit addresses.
> > This makes no functional difference as the upper parts of
> > the 64-bit addresses are not yet reachable.
>
> > Signed-off-by: Edgar E. Iglesias <edgar.igles...@xilinx.com>
> > ---
> > target/microblaze/mmu.c | 14 +++++++-------
> > target/microblaze/mmu.h | 6 +++---
> > 2 files changed, 10 insertions(+), 10 deletions(-)
>
> > diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c
> > index 231803ceea..a379968618 100644
> > --- a/target/microblaze/mmu.c
> > +++ b/target/microblaze/mmu.c
> > @@ -81,16 +81,16 @@ unsigned int mmu_translate(struct microblaze_mmu *mmu,
> > {
> > unsigned int i, hit = 0;
> > unsigned int tlb_ex = 0, tlb_wr = 0, tlb_zsel;
> > - unsigned int tlb_size;
> > - uint32_t tlb_tag, tlb_rpn, mask, t0;
> > + uint64_t tlb_tag, tlb_rpn, mask;
> > + uint32_t tlb_size, t0;
>
> > lu->err = ERR_MISS;
> > for (i = 0; i < ARRAY_SIZE(mmu->rams[RAM_TAG]); i++) {
> > - uint32_t t, d;
> > + uint64_t t, d;
>
> > /* Lookup and decode. */
> > t = mmu->rams[RAM_TAG][i];
> > - D(qemu_log("TLB %d valid=%d\n", i, t & TLB_VALID));
> > + D(qemu_log("TLB %d valid=%" PRId64 "\n", i, t & TLB_VALID));
>
> While touching this it's probably worth updating to use qemu_log_mask with
> the MMU mask instead of the D() macro.
Yeah, I added a follow-up patch to the series that cleans up the
debug/logs in this file. I kept this particular patch as is to
avoid unrelated changes to get mixed into the 64bit conversion.
Cheers,
Edgar
