On Thu, May 03, 2018 at 07:52:32AM +0200, Cédric Le Goater wrote:
> On 05/03/2018 02:58 AM, David Gibson wrote:
> > On Tue, Apr 24, 2018 at 02:41:47PM +0200, Cédric Le Goater wrote:
> >> On 04/24/2018 02:03 PM, Cédric Le Goater wrote:
> >>>> +hwaddr ppc_hash64_hpt_reg(PowerPCCPU *cpu)
> >>>> +{
> >>>> + CPUPPCState *env = &cpu->env;
> >>>> +
> >>>> + /* We should not reach this routine on sPAPR machines */
> >>>> + assert(!cpu->vhyp);
> >>>> +
> >>>> + /* PowerNV machine */
> >>>> + if (msr_hv) {
> >>>> + if (env->mmu_model & POWERPC_MMU_3_00) {
> >>>> + return ppc64_v3_get_patbe0(cpu);
> >>>> + } else {
> >>>> + return cpu->env.spr[SPR_SDR1];
> >>>> + }
> >>>> + } else {
> >>>> + error_report("PowerNV guest support Unimplemented");
> >>>> + exit(1);
> >>>
> >>> I just noticed that this breaks 970 CPUs ...
> >>
> >> How about ?
> >
> > Hmm.. I'm not actually seeing why it breaks 970.
>
> it does not have MSR_SHV bit.
It does, actually. At least, as long as it's not strapped into "Apple
mode".
> > I really want to ditch 970 support, but we have to go through the
> > deprecation process first.
>
> Is it causing a lot of maintenance issues ?
Enough. The explicit RMA allocation stuff is a particular pain.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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