From: Christophe Lyon <christophe.l...@st.com>
Co-Authored-By: Mickaël Guêné <mickael.gu...@st.com>
Signed-off-by: Christophe Lyon <christophe.l...@st.com>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
Message-Id: <20180416091845.7315-1-christophe.l...@st.com>
[lv: moved the change to linux-user/arm/cpu_loop.c]
Signed-off-by: Laurent Vivier <laur...@vivier.eu>
---
linux-user/arm/cpu_loop.c | 3 +++
linux-user/arm/target_syscall.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c
index d911929bf6..26928fbbb2 100644
--- a/linux-user/arm/cpu_loop.c
+++ b/linux-user/arm/cpu_loop.c
@@ -347,6 +347,9 @@ void cpu_loop(CPUARMState *env)
case ARM_NR_breakpoint:
env->regs[15] -= env->thumb ? 2 : 4;
goto excp_debug;
+ case ARM_NR_get_tls:
+ env->regs[0] = cpu_get_tls(env);
+ break;
default:
gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
n);
diff --git a/linux-user/arm/target_syscall.h b/linux-user/arm/target_syscall.h
index 94e2a42cb2..afc0772e19 100644
--- a/linux-user/arm/target_syscall.h
+++ b/linux-user/arm/target_syscall.h
@@ -16,6 +16,7 @@ struct target_pt_regs {
#define ARM_NR_breakpoint (ARM_NR_BASE + 1)
#define ARM_NR_cacheflush (ARM_NR_BASE + 2)
#define ARM_NR_set_tls (ARM_NR_BASE + 5)
+#define ARM_NR_get_tls (ARM_NR_BASE + 6)
#define ARM_NR_semihosting 0x123456
#define ARM_NR_thumb_semihosting 0xAB
--
2.14.3
