On 15 March 2018 at 19:11, Andrey Smirnov <andrew.smir...@gmail.com> wrote: > Code of imx_update() is slightly confusing since the "flags" variable > doesn't really corespond to anything in real hardware and server as a > kitchensink accumulating events normally reported via USR1 and USR2 > registers. > > Change the code to explicitly evaluate state of interrupts reported > via USR1 and USR2 against corresponding masking bits and use the to > detemine if IRQ line should be asserted or not. > > NOTE: Check for UTS1_TXEMPTY being set has been dropped for two > reasons: > > 1. Emulation code implements a single character FIFO, so this flag > will always be set since characters are trasmitted as a part of > the code emulating "push" into the FIFO > > 2. imx_update() is really just a function doing ORing and maksing > of reported events, so checking for UTS1_TXEMPTY should happen, > if it's ever really needed should probably happen outside of > it. > > Cc: qemu-devel@nongnu.org > Cc: qemu-...@nongnu.org > Cc: Bill Paul <wp...@windriver.com> > Cc: Peter Maydell <peter.mayd...@linaro.org> > Signed-off-by: Andrey Smirnov <andrew.smir...@gmail.com> > --- > hw/char/imx_serial.c | 24 ++++++++++++++++--------
Thanks; I've applied this patch and patch 2 to target-arm.next. As bugfixes they'll go into 2.12. PS: if you could provide cover letters for patchsets that have more than one patch in them that would help me in finding and processing them. thanks -- PMM
