On 03/02/2018 02:51 PM, Michael Clark wrote: > Define RISC-V ELF machine EM_RISCV 243 > > Reviewed-by: Richard Henderson <richard.hender...@linaro.org> > Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> > Signed-off-by: Sagar Karandikar <sag...@eecs.berkeley.edu> > Signed-off-by: Michael Clark <m...@sifive.com>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org> > --- > include/elf.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/include/elf.h b/include/elf.h > index 943ee21..c0dc9bb 100644 > --- a/include/elf.h > +++ b/include/elf.h > @@ -119,6 +119,8 @@ typedef int64_t Elf64_Sxword; > > #define EM_UNICORE32 110 /* UniCore32 */ > > +#define EM_RISCV 243 /* RISC-V */ > + > /* > * This is an interim value that we will use until the committee comes > * up with a final number. >
