First, we had noted that ARM_CP_64BIT needed to be removed from the ZCR_EL registers, but the patch set was applied without actually fixing that.
Second, there's an existing bug by which the FPCR/FPSR registers are not properly trapped when FP is disabled. Fix that with a translation-time check. Third, my attempt at using .accessfn for ZCR_EL fails to take into account the two different exception syndromes that must be raised. Although they probably aren't as important as FPCR/FPSR, handle them at translation time too. Fourth, when writing to an AdvSIMD register, zero the rest of the SVE register. r~ Richard Henderson (5): target/arm: Remove ARM_CP_64BIT from ZCR_EL registers target/arm: Enforce FP access to FPCR/FPSR target/arm: Suppress TB end for FPCR/FPSR target/arm: Enforce access to ZCR_EL at translation target/arm: Handle SVE registers when using clear_vec_high target/arm/cpu.h | 36 ++++----- target/arm/internals.h | 6 ++ target/arm/helper.c | 28 ++----- target/arm/translate-a64.c | 181 ++++++++++++++++++++------------------------- 4 files changed, 114 insertions(+), 137 deletions(-) -- 2.14.3
